diff options
| author | Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com> | 2024-02-10 22:02:22 +0900 |
|---|---|---|
| committer | Felix Singer <service+coreboot-gerrit@felixsinger.de> | 2024-02-12 04:47:24 +0000 |
| commit | 60a68295b817a40fd42af2f3c3de118bab97feee (patch) | |
| tree | fbbae3bbd234ec01334110f2225b7ee155e9a17f | |
| parent | a295ac1d44142a07157ece63a78493bbf9eb6ef6 (diff) | |
util/intelmetool: Add Intel Union Point support
The device IDs were taken from the 200 series datasheet (page 24).
Change-Id: I34b5cb61dd7b561778cc8506858cd436e6f04f9a
Signed-off-by: Nicholas Sudsgaard <devel+coreboot@nsudsgaard.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/80419
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | util/intelmetool/intelmetool.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/util/intelmetool/intelmetool.h b/util/intelmetool/intelmetool.h index 02c9988424..3946f95d6f 100644 --- a/util/intelmetool/intelmetool.h +++ b/util/intelmetool/intelmetool.h @@ -244,6 +244,14 @@ extern int debug; #define PCI_DEVICE_ID_INTEL_LEWISBURG_5 0xa1c5 #define PCI_DEVICE_ID_INTEL_LEWISBURG_6 0xa1c6 #define PCI_DEVICE_ID_INTEL_LEWISBURG_7 0xa1c7 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_H270 0xa2c4 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_Z270 0xa2c5 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_Q270 0xa2c6 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_Q250 0xa2c7 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_B250 0xa2c8 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_Z370 0xa2c9 +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_H310C 0xa2ca +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_X299 0xa2d2 #define PCI_DEV_HAS_ME_DIFFICULT(x) ( \ ((x) == PCI_DEVICE_ID_INTEL_ICH10R) || \ @@ -358,6 +366,14 @@ extern int debug; ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_5) || \ ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_6) || \ ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_7) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_H270) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Z270) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Q270) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Q250) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_B250) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_Z370) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_H310C) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_X299) || \ 0) // Not sure if ME present, but should be able to disable it easily @@ -438,6 +454,9 @@ extern int debug; #define PCI_DEVICE_ID_INTEL_LEWISBURG_IE3 0xA1FC /* IE Lewisburg #3 */ #define PCI_DEVICE_ID_INTEL_CANNONLAKE 0xA360 /* Cannon Lake */ #define PCI_DEVICE_ID_INTEL_BAYTRAIL 0x0F18 /* Bay Trail */ +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI1 0xA2BA /* Union Point MEI #1 */ +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI2 0xA2BB /* Union Point MEI #2 */ +#define PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI3 0xA2BE /* Union Point MEI #3 */ #define PCI_DEV_HAS_SUPPORTED_ME(x) ( \ ((x) == PCI_DEVICE_ID_INTEL_COUGARPOINT_1) || \ @@ -493,4 +512,7 @@ extern int debug; ((x) == PCI_DEVICE_ID_INTEL_LEWISBURG_IE3) || \ ((x) == PCI_DEVICE_ID_INTEL_CANNONLAKE) || \ ((x) == PCI_DEVICE_ID_INTEL_BAYTRAIL) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI1) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI2) || \ + ((x) == PCI_DEVICE_ID_INTEL_UNIONPOINT_MEI3) || \ 0) |