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authorFred Reitberger <reitbergerfred@gmail.com>2023-05-12 12:53:52 -0400
committerLean Sheng Tan <sheng.tan@9elements.com>2023-05-14 12:49:34 +0000
commit5c1c7b6904096ae1550be9a3cf800d2b7fb07433 (patch)
treeff69005f81e4cd53013ecd2151bc9f4ee2c0a7ba
parent096e04c9352426dc6099c039a81b27531635a860 (diff)
soc/amd/phoenix/Kconfig: Update default soft fuse bits
Set the default soft fuse bits to the recommended values Signed-off-by: Fred Reitberger <reitbergerfred@gmail.com> Change-Id: I2354aefe90a08eaef95a68926806d11a9118c3de Reviewed-on: https://review.coreboot.org/c/coreboot/+/75183 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin L Roth <gaumless@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/soc/amd/phoenix/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/amd/phoenix/Kconfig b/src/soc/amd/phoenix/Kconfig
index f1b9e638d7..4efe5c93d7 100644
--- a/src/soc/amd/phoenix/Kconfig
+++ b/src/soc/amd/phoenix/Kconfig
@@ -430,7 +430,7 @@ config SPL_RW_AB_TABLE_FILE
config PSP_SOFTFUSE_BITS
string "PSP Soft Fuse bits to enable"
- default "34 28 6"
+ default "36 28 6"
help
Space separated list of Soft Fuse bits to enable.
Bit 0: Enable secure debug (Set by PSP_UNLOCK_SECURE_DEBUG)