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authorUsha P <usha.p@intel.com>2021-11-15 18:40:00 +0530
committerFelix Held <felix-coreboot@felixheld.de>2021-11-29 09:46:40 +0000
commit5b94cd9e9d0aae0bfba68fa65bf94a0d5985fa87 (patch)
treef5f320155db2cb55c5ffad610ab693de9d5fe790
parent248dbe0908f1b934d465550987a2497cd6593b4b (diff)
soc/intel/common: Include Alder Lake-N device IDs
Add Alder Lake-N specific CPU, System Agent, PCH (Alder Point aka ADP), IGD device IDs. Document Number: 619501, 645548 Signed-off-by: Usha P <usha.p@intel.com> Change-Id: I0974fc6ee2ca41d9525cc83155772f111c1fdf86 Reviewed-on: https://review.coreboot.org/c/coreboot/+/59306 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com>
-rw-r--r--src/include/cpu/intel/cpu_ids.h1
-rw-r--r--src/include/device/pci_ids.h7
-rw-r--r--src/soc/intel/alderlake/bootblock/report_platform.c6
-rw-r--r--src/soc/intel/common/block/cpu/mp_init.c1
-rw-r--r--src/soc/intel/common/block/graphics/graphics.c3
-rw-r--r--src/soc/intel/common/block/systemagent/systemagent.c2
6 files changed, 20 insertions, 0 deletions
diff --git a/src/include/cpu/intel/cpu_ids.h b/src/include/cpu/intel/cpu_ids.h
index 53140762d4..0f7c5c1e87 100644
--- a/src/include/cpu/intel/cpu_ids.h
+++ b/src/include/cpu/intel/cpu_ids.h
@@ -55,5 +55,6 @@
#define CPUID_ALDERLAKE_A1 0x906a1
#define CPUID_ALDERLAKE_A2 0x906a2
#define CPUID_ALDERLAKE_A3 0x906a4
+#define CPUID_ALDERLAKE_N_A0 0xb06e0
#endif /* CPU_INTEL_CPU_IDS_H */
diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 63b735f7d7..db51905598 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -3886,6 +3886,10 @@
#define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0
#define PCI_DEVICE_ID_INTEL_ADL_M_GT2 0x46aa
#define PCI_DEVICE_ID_INTEL_ADL_M_GT3 0x46c3
+#define PCI_DEVICE_ID_INTEL_ADL_N_GT1 0x46D0
+#define PCI_DEVICE_ID_INTEL_ADL_N_GT2 0x46D1
+#define PCI_DEVICE_ID_INTEL_ADL_N_GT3 0x46D2
+
/* Intel Northbridge Ids */
#define PCI_DEVICE_ID_INTEL_APL_NB 0x5af0
@@ -3997,6 +4001,9 @@
#define PCI_DEVICE_ID_INTEL_ADL_P_ID_9 0x467f
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_1 0x4602
#define PCI_DEVICE_ID_INTEL_ADL_M_ID_2 0x460a
+#define PCI_DEVICE_ID_INTEL_ADL_N_ID_1 0x4617
+#define PCI_DEVICE_ID_INTEL_ADL_N_ID_2 0x461B
+
/* Intel SMBUS device Ids */
#define PCI_DEVICE_ID_INTEL_LPT_H_SMBUS 0x8c22
#define PCI_DEVICE_ID_INTEL_LPT_LP_SMBUS 0x9c22
diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c
index 2fc8eab79c..76e6c804c2 100644
--- a/src/soc/intel/alderlake/bootblock/report_platform.c
+++ b/src/soc/intel/alderlake/bootblock/report_platform.c
@@ -27,6 +27,7 @@ static struct {
{ CPUID_ALDERLAKE_A1, "Alderlake Platform" },
{ CPUID_ALDERLAKE_A2, "Alderlake Platform" },
{ CPUID_ALDERLAKE_A3, "Alderlake Platform" },
+ { CPUID_ALDERLAKE_N_A0, "Alderlake-N Platform" },
};
static struct {
@@ -43,6 +44,8 @@ static struct {
{ PCI_DEVICE_ID_INTEL_ADL_P_ID_9, "Alderlake-P" },
{ PCI_DEVICE_ID_INTEL_ADL_M_ID_1, "Alderlake-M" },
{ PCI_DEVICE_ID_INTEL_ADL_M_ID_2, "Alderlake-M" },
+ { PCI_DEVICE_ID_INTEL_ADL_N_ID_1, "Alderlake-N" },
+ { PCI_DEVICE_ID_INTEL_ADL_N_ID_2, "Alderlake-N" },
};
static struct {
@@ -111,6 +114,9 @@ static struct {
{ PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT2, "Alderlake M GT2" },
{ PCI_DEVICE_ID_INTEL_ADL_M_GT3, "Alderlake M GT3" },
+ { PCI_DEVICE_ID_INTEL_ADL_N_GT1, "Alderlake N GT1" },
+ { PCI_DEVICE_ID_INTEL_ADL_N_GT2, "Alderlake N GT2" },
+ { PCI_DEVICE_ID_INTEL_ADL_N_GT3, "Alderlake N GT3" },
};
static inline uint8_t get_dev_revision(pci_devfn_t dev)
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index acd15a8f2c..b7e2243631 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -72,6 +72,7 @@ static const struct cpu_device_id cpu_table[] = {
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A1 },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A2 },
{ X86_VENDOR_INTEL, CPUID_ALDERLAKE_A3 },
+ { X86_VENDOR_INTEL, CPUID_ALDERLAKE_N_A0},
{ 0, 0 },
};
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index e7e96ad934..1db0e46455 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -311,6 +311,9 @@ static const unsigned short pci_device_ids[] = {
PCI_DEVICE_ID_INTEL_ADL_M_GT1,
PCI_DEVICE_ID_INTEL_ADL_M_GT2,
PCI_DEVICE_ID_INTEL_ADL_M_GT3,
+ PCI_DEVICE_ID_INTEL_ADL_N_GT1,
+ PCI_DEVICE_ID_INTEL_ADL_N_GT2,
+ PCI_DEVICE_ID_INTEL_ADL_N_GT3,
0,
};
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index 572b41742a..b7c6d4f41b 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -435,6 +435,8 @@ static const unsigned short systemagent_ids[] = {
PCI_DEVICE_ID_INTEL_ADL_P_ID_9,
PCI_DEVICE_ID_INTEL_ADL_M_ID_1,
PCI_DEVICE_ID_INTEL_ADL_M_ID_2,
+ PCI_DEVICE_ID_INTEL_ADL_N_ID_1,
+ PCI_DEVICE_ID_INTEL_ADL_N_ID_2,
0
};