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authorElyes HAOUAS <ehaouas@noos.fr>2018-12-12 15:06:33 +0100
committerFelix Held <felix-coreboot@felixheld.de>2018-12-18 13:49:31 +0000
commit586f24dab48c187c739ab725589248ff02999f3a (patch)
treea3a7ccfa8fcb4cc2c80be8164b640018c6aebcf7
parent0c0208b590fd791fc03fc626c94e30c1c80e073d (diff)
northbridge: Remove unneeded include <pc80/mc146818rtc.h>
Change-Id: Icae59721db530572d76035975a4e90686bf4fa65 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/30195 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/northbridge/amd/amdfam10/nb_control.c1
-rw-r--r--src/northbridge/intel/haswell/raminit.c1
-rw-r--r--src/northbridge/intel/pineview/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/raminit.c1
-rw-r--r--src/northbridge/intel/x4x/raminit_ddr23.c1
-rw-r--r--src/northbridge/via/vx900/lpc.c1
6 files changed, 0 insertions, 6 deletions
diff --git a/src/northbridge/amd/amdfam10/nb_control.c b/src/northbridge/amd/amdfam10/nb_control.c
index 255948db87..a9bdb18415 100644
--- a/src/northbridge/amd/amdfam10/nb_control.c
+++ b/src/northbridge/amd/amdfam10/nb_control.c
@@ -23,7 +23,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <device/pci_ops.h>
-#include <pc80/mc146818rtc.h>
#include <cpu/amd/model_10xxx_rev.h>
#include "amdfam10.h"
diff --git a/src/northbridge/intel/haswell/raminit.c b/src/northbridge/intel/haswell/raminit.c
index 221d71f1af..faaa9d0412 100644
--- a/src/northbridge/intel/haswell/raminit.c
+++ b/src/northbridge/intel/haswell/raminit.c
@@ -23,7 +23,6 @@
#include <ip_checksum.h>
#include <memory_info.h>
#include <mrc_cache.h>
-#include <pc80/mc146818rtc.h>
#include <device/pci_def.h>
#include <device/dram/ddr3.h>
#include <smbios.h>
diff --git a/src/northbridge/intel/pineview/raminit.c b/src/northbridge/intel/pineview/raminit.c
index f199d9beed..512403fef4 100644
--- a/src/northbridge/intel/pineview/raminit.c
+++ b/src/northbridge/intel/pineview/raminit.c
@@ -22,7 +22,6 @@
#include <lib.h>
#include "pineview.h"
#include "raminit.h"
-#include <pc80/mc146818rtc.h>
#include <spd.h>
#include <string.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index c97c139031..b3b84d8061 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -29,7 +29,6 @@
#include <southbridge/intel/i82801jx/i82801jx.h> /* smbus_read_byte */
#endif
#include "x4x.h"
-#include <pc80/mc146818rtc.h>
#include <spd.h>
#include <string.h>
#include <device/dram/ddr2.h>
diff --git a/src/northbridge/intel/x4x/raminit_ddr23.c b/src/northbridge/intel/x4x/raminit_ddr23.c
index 32fa0d9cf0..5c5dafa644 100644
--- a/src/northbridge/intel/x4x/raminit_ddr23.c
+++ b/src/northbridge/intel/x4x/raminit_ddr23.c
@@ -20,7 +20,6 @@
#include <console/console.h>
#include <commonlib/helpers.h>
#include <delay.h>
-#include <pc80/mc146818rtc.h>
#if IS_ENABLED(CONFIG_SOUTHBRIDGE_INTEL_I82801GX)
#include <southbridge/intel/i82801gx/i82801gx.h>
#else
diff --git a/src/northbridge/via/vx900/lpc.c b/src/northbridge/via/vx900/lpc.c
index b9dac56921..27e23846ee 100644
--- a/src/northbridge/via/vx900/lpc.c
+++ b/src/northbridge/via/vx900/lpc.c
@@ -20,7 +20,6 @@
#include <device/pci.h>
#include <device/pci_ids.h>
#include <pc80/i8259.h>
-#include <pc80/mc146818rtc.h>
#include <drivers/generic/ioapic/chip.h>
#include "vx900.h"