diff options
author | Simon Yang <simon1.yang@intel.com> | 2024-10-20 17:54:02 +0800 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2024-10-22 04:24:28 +0000 |
commit | 5775ed215e59fe0d45b422e19458e63f7d46329e (patch) | |
tree | 139a174f3f5ca79def2bdd400739eb89f7942d6e | |
parent | 5a5f39ce8637f61514da9ce47515126218befb8c (diff) |
soc/intel/alderlake_n: Fix display flicker issue when using internal FIVR
If project set configure_ext_fivr = 0 will cause
PchFivrVccstIccMaxControl do not set correctly.
BUG=b:361831628
TEST=Verified on Teliks360 that affected DUTs.
Change-Id: I816de9c0c507aad3b73ab29e9f72048704f4662d
Signed-off-by: Simon Yang <simon1.yang@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84812
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Qinghong Zeng <zengqinghong@huaqin.corp-partner.google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
-rw-r--r-- | src/soc/intel/alderlake/fsp_params.c | 18 |
1 files changed, 9 insertions, 9 deletions
diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index 41d048b68f..839d161eae 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -1200,6 +1200,15 @@ static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, static void fill_fsps_fivr_params(FSP_S_CONFIG *s_cfg, const struct soc_intel_alderlake_config *config) { +#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N) + /* Enable the FIVR VCCST ICCMax Control for ADL-N. + * TODO:Right now the UPD is update in partial headers for only ADL-N and when its + * updated for ADL-P then we will remove the config since this needs to be enabled for + * all the Alderlake platforms. + */ + s_cfg->PchFivrVccstIccMaxControl = 1; +#endif + /* PCH FIVR settings override */ if (!config->ext_fivr_settings.configure_ext_fivr) return; @@ -1234,15 +1243,6 @@ static void fill_fsps_fivr_params(FSP_S_CONFIG *s_cfg, s_cfg->PchFivrExtVnnRailIccMaximum = config->ext_fivr_settings.vnn_icc_max_ma; - -#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_N) - /* Enable the FIVR VCCST ICCMax Control for ADL-N. - * TODO:Right now the UPD is update in partial headers for only ADL-N and when its - * updated for ADL-P then we will remove the config since this needs to be enabled for - * all the Alderlake platforms. - */ - s_cfg->PchFivrVccstIccMaxControl = 1; -#endif } static void fill_fsps_fivr_rfi_params(FSP_S_CONFIG *s_cfg, |