summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSean Rhodes <sean@starlabs.systems>2023-07-06 12:21:27 +0100
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-07-28 14:17:03 +0000
commit5700a1e7f029ca84530c6dc926e0d9dac942a016 (patch)
treebf820baf8d03355d4df0ec2503278ced8317b985
parentcb40888c8dc087242ed88a919f14c4324e75bac5 (diff)
mb/starlabs/starbook: Adjust TCC Offset for all boards
Lower the TCC Offset by 10 degress. Change-Id: Ib80d3b73c41ec1196d8294c35b43333e0df218d5 Signed-off-by: Sean Rhodes <sean@starlabs.systems> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76374 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/starlabs/starbook/variants/cml/devtree.c6
-rw-r--r--src/mainboard/starlabs/starbook/variants/tgl/devtree.c6
2 files changed, 6 insertions, 6 deletions
diff --git a/src/mainboard/starlabs/starbook/variants/cml/devtree.c b/src/mainboard/starlabs/starbook/variants/cml/devtree.c
index 95a5d44ea3..6985c67d16 100644
--- a/src/mainboard/starlabs/starbook/variants/cml/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/cml/devtree.c
@@ -22,17 +22,17 @@ void devtree_update(void)
disable_turbo();
soc_conf->tdp_pl1_override = 15;
soc_conf->tdp_pl2_override = 15;
- cfg->tcc_offset = 20;
+ cfg->tcc_offset = 30;
break;
case PP_BALANCED:
soc_conf->tdp_pl1_override = 17;
soc_conf->tdp_pl2_override = 20;
- cfg->tcc_offset = 15;
+ cfg->tcc_offset = 25;
break;
case PP_PERFORMANCE:
soc_conf->tdp_pl1_override = 20;
soc_conf->tdp_pl2_override = 25;
- cfg->tcc_offset = 10;
+ cfg->tcc_offset = 20;
break;
}
diff --git a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
index 0077a63604..7c94430ee8 100644
--- a/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
+++ b/src/mainboard/starlabs/starbook/variants/tgl/devtree.c
@@ -31,21 +31,21 @@ void devtree_update(void)
soc_conf_4core->tdp_pl1_override = 15;
soc_conf_2core->tdp_pl2_override = 15;
soc_conf_4core->tdp_pl2_override = 15;
- cfg->tcc_offset = 20;
+ cfg->tcc_offset = 30;
break;
case PP_BALANCED:
soc_conf_2core->tdp_pl1_override = 15;
soc_conf_4core->tdp_pl1_override = 15;
soc_conf_2core->tdp_pl2_override = 25;
soc_conf_4core->tdp_pl2_override = 25;
- cfg->tcc_offset = 15;
+ cfg->tcc_offset = 25;
break;
case PP_PERFORMANCE:
soc_conf_2core->tdp_pl1_override = 28;
soc_conf_4core->tdp_pl1_override = 28;
soc_conf_2core->tdp_pl2_override = 40;
soc_conf_4core->tdp_pl2_override = 40;
- cfg->tcc_offset = 10;
+ cfg->tcc_offset = 20;
break;
}