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authorTim Wawrzynczak <twawrzynczak@chromium.org>2022-07-27 10:09:04 -0600
committerPaul Fagerburg <pfagerburg@chromium.org>2022-07-28 20:02:56 +0000
commit5625dace84929b0fb6d3feb2bceda9dd0d5bb087 (patch)
treeedfe403b8869585b304f0b55d9566d8d486a939c
parent460fea65239db16efd4777b3d28f661b906ff469 (diff)
mb/google/brya/acpi: Add L23 entry/exit sequences during dGPU GCOFF
When the dGPU is entering GCOFF, the link should first be placed into L2/L3 as appropriate for the design, then when exiting, the link should be placed back into L0. This patch fixes that oversight. BUG=b:239719056 TEST=build Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Change-Id: Ia3bdfe5641216675e06ebe82ffe58bf8c049b26b Reviewed-on: https://review.coreboot.org/c/coreboot/+/66200 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Reviewed-by: Ivy Jian <ivy.jian@quanta.corp-partner.google.com> Reviewed-by: Paul Menzel <paulepanter@mailbox.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/mainboard/google/brya/acpi/power.asl2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/acpi/power.asl b/src/mainboard/google/brya/acpi/power.asl
index 6f69c89374..2dd8706a8e 100644
--- a/src/mainboard/google/brya/acpi/power.asl
+++ b/src/mainboard/google/brya/acpi/power.asl
@@ -221,6 +221,7 @@ Method (NPON, 0, Serialized)
Else
{
PGON ()
+ \_SB.PCI0.PEG0.LD23 ()
}
}
@@ -239,6 +240,7 @@ Method (NPOF, 0, Serialized)
}
Else
{
+ \_SB.PCI0.PEG0.DL23 ()
PGOF ()
}
}