diff options
| author | Subrata Banik <subrata.banik@intel.com> | 2018-12-19 16:50:57 +0530 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2019-03-19 21:42:30 +0000 |
| commit | 55fb6b4d0d6ab4d8d5e04a1822e1889810b42ce7 (patch) | |
| tree | 2dbaeabb6eb3d8d3799d6822f2040acb627b6989 | |
| parent | 8a83282795a3338324f4a039d3fb623cb5b3cea6 (diff) | |
soc/intel/icelake: Enable support for FSP 2.1 specification
Remove FSP 2.0 support from ICL SoC and add FSP 2.1 support.
Change-Id: Ife0c133ddbf2e0fa14f94ffec15d11830cfaf7b3
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/30158
Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/intel/icelake/Kconfig | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/src/soc/intel/icelake/Kconfig b/src/soc/intel/icelake/Kconfig index 34af3395a6..2e9e3e251f 100644 --- a/src/soc/intel/icelake/Kconfig +++ b/src/soc/intel/icelake/Kconfig @@ -19,7 +19,6 @@ config CPU_SPECIFIC_OPTIONS select CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM select COMMON_FADT select CPU_INTEL_FIRMWARE_INTERFACE_TABLE - select FSP_USES_CB_STACK select GENERIC_GPIO_LIB select HAVE_FSP_GOP select INTEL_DESCRIPTOR_MODE_CAPABLE @@ -32,8 +31,8 @@ config CPU_SPECIFIC_OPTIONS select MRC_SETTINGS_PROTECT select PARALLEL_MP select PARALLEL_MP_AP_WORK - select PLATFORM_USES_FSP2_0 select MICROCODE_BLOB_UNDISCLOSED + select PLATFORM_USES_FSP2_1 select POSTCAR_CONSOLE select POSTCAR_STAGE select REG_SCRIPT |