Remove some duplicate #include files (trivial).

Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de>
Acked-by: Uwe Hermann <uwe@hermann-uwe.de>



git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5921 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1

18 files changed, 9 insertions, 46 deletions

diff --git a/src/cpu/amd/model_10xxx/model_10xxx_init.c b/src/cpu/amd/model_10xxx/model_10xxx_init.c
index 7fc3e277ab..9cd6d66e4a 100644
--- a/src/cpu/amd/model_10xxx/model_10xxx_init.c
+++ b/src/cpu/amd/model_10xxx/model_10xxx_init.c
@@ -27,9 +27,7 @@
 #include <cpu/x86/pae.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
-
 #include "northbridge/amd/amdfam10/amdfam10.h"
-
 #include <cpu/amd/model_10xxx_rev.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
diff --git a/src/cpu/amd/model_fxx/model_fxx_init.c b/src/cpu/amd/model_fxx/model_fxx_init.c
index 460cbf40d4..865198a52a 100644
--- a/src/cpu/amd/model_fxx/model_fxx_init.c
+++ b/src/cpu/amd/model_fxx/model_fxx_init.c
@@ -7,6 +7,7 @@
  * Copyright 2005 AMD
  * 2005.08 yhlu add microcode support
  */
+
 #include <console/console.h>
 #include <cpu/x86/msr.h>
 #include <cpu/amd/mtrr.h>
@@ -17,17 +18,13 @@
 #include <cpu/x86/pae.h>
 #include <pc80/mc146818rtc.h>
 #include <cpu/x86/lapic.h>
-
 #include "northbridge/amd/amdk8/amdk8.h"
-
 #include <cpu/amd/model_fxx_rev.h>
 #include <cpu/amd/microcode.h>
 #include <cpu/cpu.h>
 #include <cpu/x86/cache.h>
 #include <cpu/x86/mtrr.h>
-
 #include <cpu/amd/multicore.h>
-
 #include <cpu/amd/model_fxx_msr.h>
 
 #if CONFIG_WAIT_BEFORE_CPUS_INIT
@@ -110,6 +107,7 @@ struct mtrr {
 	msr_t base;
 	msr_t mask;
 };
+
 struct mtrr_state {
 	struct mtrr mtrrs[MTRR_COUNT];
 	msr_t top_mem, top_mem2;
diff --git a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
index 85a652fc00..5cc0fba476 100644
--- a/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
+++ b/src/cpu/amd/model_fxx/model_fxx_update_microcode.c
@@ -19,16 +19,10 @@
  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301 USA
  */
 
-/*
- * Description: Microcode patch support for k8 by yhlu
- */
-
-
 #include <console/console.h>
 #include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
-
 #include <cpu/amd/microcode.h>
 
 static uint8_t microcode_updates[] __attribute__ ((aligned(16))) = {
@@ -80,7 +74,6 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
 
 	};
 
-
 	unsigned new_id;
 	int i;
 
@@ -94,7 +87,6 @@ static unsigned get_equivalent_processor_rev_id(unsigned orig_id) {
 	}
 
 	return new_id;
-
 }
 
 void model_fxx_update_microcode(unsigned cpu_deviceid)
@@ -105,6 +97,4 @@ void model_fxx_update_microcode(unsigned cpu_deviceid)
 	equivalent_processor_rev_id = get_equivalent_processor_rev_id(cpu_deviceid );
 	if(equivalent_processor_rev_id != 0)
 	        amd_update_microcode(microcode_updates, equivalent_processor_rev_id);
-
 }
-
diff --git a/src/cpu/amd/model_gx2/model_gx2_init.c b/src/cpu/amd/model_gx2/model_gx2_init.c
index 435e89aa81..241c0f979f 100644
--- a/src/cpu/amd/model_gx2/model_gx2_init.c
+++ b/src/cpu/amd/model_gx2/model_gx2_init.c
@@ -6,7 +6,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/cache.h>
 
-
 static void vsm_end_post_smi(void)
 {
 	__asm__ volatile (
diff --git a/src/cpu/intel/model_1067x/model_1067x_init.c b/src/cpu/intel/model_1067x/model_1067x_init.c
index a379805cb6..7229b63ce9 100644
--- a/src/cpu/intel/model_1067x/model_1067x_init.c
+++ b/src/cpu/intel/model_1067x/model_1067x_init.c
@@ -30,7 +30,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/name.h>
 
 static const uint32_t microcode_updates[] = {
diff --git a/src/cpu/intel/model_106cx/model_106cx_init.c b/src/cpu/intel/model_106cx/model_106cx_init.c
index 4a621df31a..257bb44f7f 100644
--- a/src/cpu/intel/model_106cx/model_106cx_init.c
+++ b/src/cpu/intel/model_106cx/model_106cx_init.c
@@ -28,7 +28,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/name.h>
 #include <usbdebug.h>
 
diff --git a/src/cpu/intel/model_69x/model_69x_init.c b/src/cpu/intel/model_69x/model_69x_init.c
index b6ea237366..588ea69ab3 100644
--- a/src/cpu/intel/model_69x/model_69x_init.c
+++ b/src/cpu/intel/model_69x/model_69x_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/*  Dummy terminator  */
@@ -19,7 +17,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_69x_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
@@ -37,6 +34,7 @@ static void model_69x_init(device_t dev)
 static struct device_operations cpu_dev_ops = {
 	.init     = model_69x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0690 }, /* Pentium M */
 	{ X86_VENDOR_INTEL, 0x0695 },
diff --git a/src/cpu/intel/model_6dx/model_6dx_init.c b/src/cpu/intel/model_6dx/model_6dx_init.c
index 26c1b99499..76b2e16f21 100644
--- a/src/cpu/intel/model_6dx/model_6dx_init.c
+++ b/src/cpu/intel/model_6dx/model_6dx_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/*  Dummy terminator  */
@@ -19,7 +17,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_6dx_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
@@ -37,6 +34,7 @@ static void model_6dx_init(device_t dev)
 static struct device_operations cpu_dev_ops = {
 	.init     = model_6dx_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x06D0 }, /* Pentium M on 90nm with 2MiB of L2 cache */
 	{ X86_VENDOR_INTEL, 0x06D6 }, /* Pentium M on 90nm with 2MiB of L2 cache */
diff --git a/src/cpu/intel/model_6ex/model_6ex_init.c b/src/cpu/intel/model_6ex/model_6ex_init.c
index b6a951335c..384b2bf68b 100644
--- a/src/cpu/intel/model_6ex/model_6ex_init.c
+++ b/src/cpu/intel/model_6ex/model_6ex_init.c
@@ -30,7 +30,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/name.h>
 #include <usbdebug.h>
 
diff --git a/src/cpu/intel/model_6fx/model_6fx_init.c b/src/cpu/intel/model_6fx/model_6fx_init.c
index c43b8debb1..0944aab955 100644
--- a/src/cpu/intel/model_6fx/model_6fx_init.c
+++ b/src/cpu/intel/model_6fx/model_6fx_init.c
@@ -30,7 +30,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/name.h>
 #include <usbdebug.h>
 
diff --git a/src/cpu/intel/model_6xx/model_6xx_init.c b/src/cpu/intel/model_6xx/model_6xx_init.c
index 712cd0508d..5b8dd3519b 100644
--- a/src/cpu/intel/model_6xx/model_6xx_init.c
+++ b/src/cpu/intel/model_6xx/model_6xx_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/* WARNING - Intel has a new data structure that has variable length
@@ -33,7 +31,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_6xx_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
diff --git a/src/cpu/intel/model_f0x/model_f0x_init.c b/src/cpu/intel/model_f0x/model_f0x_init.c
index 568d4d70ee..a06068e571 100644
--- a/src/cpu/intel/model_f0x/model_f0x_init.c
+++ b/src/cpu/intel/model_f0x/model_f0x_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 /* 256KB cache */
 static uint32_t microcode_updates[] = {
@@ -25,7 +23,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_f0x_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
@@ -43,6 +40,7 @@ static void model_f0x_init(device_t dev)
 static struct device_operations cpu_dev_ops = {
 	.init     = model_f0x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0f0A },
 	{ 0, 0 },
diff --git a/src/cpu/intel/model_f1x/model_f1x_init.c b/src/cpu/intel/model_f1x/model_f1x_init.c
index f8dd1d85f7..f70e96a035 100644
--- a/src/cpu/intel/model_f1x/model_f1x_init.c
+++ b/src/cpu/intel/model_f1x/model_f1x_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -9,7 +8,6 @@
 #include <cpu/x86/lapic.h>
 #include <cpu/intel/microcode.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 /* 256KB cache */
 static uint32_t microcode_updates[] = {
@@ -25,7 +23,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_f1x_init(device_t dev)
 {
 	/* Turn on caching if we haven't already */
@@ -43,6 +40,7 @@ static void model_f1x_init(device_t dev)
 static struct device_operations cpu_dev_ops = {
 	.init     = model_f1x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0f12 },
 	{ 0, 0 },
diff --git a/src/cpu/intel/model_f2x/model_f2x_init.c b/src/cpu/intel/model_f2x/model_f2x_init.c
index a77fe1ccd1..ead1c8a2bb 100644
--- a/src/cpu/intel/model_f2x/model_f2x_init.c
+++ b/src/cpu/intel/model_f2x/model_f2x_init.c
@@ -9,7 +9,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 /* 512KB cache */
 static uint32_t microcode_updates[] = {
@@ -49,6 +48,7 @@ static void model_f2x_init(device_t cpu)
 static struct device_operations cpu_dev_ops = {
 	.init     = model_f2x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0f22 },
 	{ X86_VENDOR_INTEL, 0x0f24 },
diff --git a/src/cpu/intel/model_f3x/model_f3x_init.c b/src/cpu/intel/model_f3x/model_f3x_init.c
index f59ef5d371..f04ddcc0ce 100644
--- a/src/cpu/intel/model_f3x/model_f3x_init.c
+++ b/src/cpu/intel/model_f3x/model_f3x_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -10,7 +9,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/* WARNING - Intel has a new data structure that has variable length
@@ -29,7 +27,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_f3x_init(device_t cpu)
 {
 	/* Turn on caching if we haven't already */
@@ -50,6 +47,7 @@ static void model_f3x_init(device_t cpu)
 static struct device_operations cpu_dev_ops = {
 	.init = model_f3x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0f34 }, /* Xeon */
 	{ 0, 0 },
diff --git a/src/cpu/intel/model_f4x/model_f4x_init.c b/src/cpu/intel/model_f4x/model_f4x_init.c
index d6acddee09..e2ab022ebd 100644
--- a/src/cpu/intel/model_f4x/model_f4x_init.c
+++ b/src/cpu/intel/model_f4x/model_f4x_init.c
@@ -1,6 +1,5 @@
 #include <console/console.h>
 #include <device/device.h>
-#include <device/device.h>
 #include <device/pci.h>
 #include <string.h>
 #include <cpu/cpu.h>
@@ -10,7 +9,6 @@
 #include <cpu/intel/microcode.h>
 #include <cpu/intel/hyperthreading.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static uint32_t microcode_updates[] = {
 	/* WARNING - Intel has a new data structure that has variable length
@@ -26,7 +24,6 @@ static uint32_t microcode_updates[] = {
         0x0, 0x0, 0x0, 0x0,
 };
 
-
 static void model_f4x_init(device_t cpu)
 {
 	/* Turn on caching if we haven't already */
@@ -47,6 +44,7 @@ static void model_f4x_init(device_t cpu)
 static struct device_operations cpu_dev_ops = {
 	.init = model_f4x_init,
 };
+
 static struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, 0x0f41 }, /* Xeon */
 	{ 0, 0 },
diff --git a/src/cpu/via/model_c3/model_c3_init.c b/src/cpu/via/model_c3/model_c3_init.c
index 291e4afef9..2fd2be4056 100644
--- a/src/cpu/via/model_c3/model_c3_init.c
+++ b/src/cpu/via/model_c3/model_c3_init.c
@@ -25,7 +25,6 @@
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 static void model_c3_init(device_t dev)
 {
diff --git a/src/cpu/via/model_c7/model_c7_init.c b/src/cpu/via/model_c7/model_c7_init.c
index 5474b8d6c7..68b5ed0451 100644
--- a/src/cpu/via/model_c7/model_c7_init.c
+++ b/src/cpu/via/model_c7/model_c7_init.c
@@ -23,13 +23,11 @@
 #include <console/console.h>
 #include <delay.h>
 #include <stdlib.h>
-
 #include <cpu/cpu.h>
 #include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <cpu/x86/lapic.h>
 #include <cpu/x86/cache.h>
-#include <cpu/x86/mtrr.h>
 
 #define MSR_IA32_PERF_STATUS	0x00000198
 #define MSR_IA32_PERF_CTL	0x00000199