summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2022-05-06 17:39:46 +0200
committerFelix Held <felix-coreboot@felixheld.de>2022-05-16 12:28:46 +0000
commit5481eb3c2e753ed89dd1eed4e2da96e03c48ef67 (patch)
treeb70f8030465e282a6acfa9465f16c4abd88ec914
parent876a1b48f87d0fe6d86ce22fb74b5c705bed6bcd (diff)
mb/google/guybrush/devicetree: use defines for ComboPhyStaticConfig
Use the existing definitions from FspUsb.h instead of magic values for the ComboPhyStaticConfig settings in the mainboard's devicetree. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I2707d017909b7516e5d8711c8f4e2914165ed10d Reviewed-on: https://review.coreboot.org/c/coreboot/+/64124 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r--src/mainboard/google/guybrush/variants/baseboard/devicetree.cb4
-rw-r--r--src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb4
2 files changed, 4 insertions, 4 deletions
diff --git a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
index 696e16dbfe..0b69af9f9b 100644
--- a/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/guybrush/variants/baseboard/devicetree.cb
@@ -217,8 +217,8 @@ chip soc/amd/cezanne
.tx_vboost_lvl_en=1,
.tx_vboost_lvl=5,
},
- .ComboPhyStaticConfig[0] = 0,
- .ComboPhyStaticConfig[1] = 0,
+ .ComboPhyStaticConfig[0] = USB_COMBO_PHY_MODE_USB_C,
+ .ComboPhyStaticConfig[1] = USB_COMBO_PHY_MODE_USB_C,
.BatteryChargerEnable = 0,
.PhyP3CpmP4Support = 0,
}"
diff --git a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb
index 85581d2d5a..8270b147bb 100644
--- a/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb
+++ b/src/mainboard/google/guybrush/variants/nipperkin/overridetree.cb
@@ -154,8 +154,8 @@ chip soc/amd/cezanne
.tx_vboost_lvl_en=1,
.tx_vboost_lvl=5,
},
- .ComboPhyStaticConfig[0] = 0,
- .ComboPhyStaticConfig[1] = 0,
+ .ComboPhyStaticConfig[0] = USB_COMBO_PHY_MODE_USB_C,
+ .ComboPhyStaticConfig[1] = USB_COMBO_PHY_MODE_USB_C,
.BatteryChargerEnable = 0,
.PhyP3CpmP4Support = 0,
}"