diff options
| author | Cliff Huang <cliff.huang@intel.com> | 2023-01-19 21:38:56 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-01-25 14:33:06 +0000 |
| commit | 546e0935436876ce5b1083d6e5ef9a33bb8c861d (patch) | |
| tree | 1db789c5f44dcf6533b59f7fc5131f4a7405af7c | |
| parent | 92c920b7304368188234c55f056e766db7d3e735 (diff) | |
soc/intel/common/gpio: Add function to read GPIO TX value
This function reads out the current value set to output for a GPIO pin.
Ex: GPP_E0 is set to output
int e0_val;
e0_val = gpio_tx_get(GPP_E0);
Signed-off-by: Cliff Huang <cliff.huang@intel.com>
Change-Id: Ib02b9ab50d378eb163d91aed1576428b49cec2cf
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72127
Reviewed-by: Anil Kumar K <anil.kumar.k@intel.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Bora Guvendik <bora.guvendik@intel.com>
| -rw-r--r-- | src/include/gpio.h | 1 | ||||
| -rw-r--r-- | src/soc/intel/common/block/gpio/gpio.c | 12 |
2 files changed, 13 insertions, 0 deletions
diff --git a/src/include/gpio.h b/src/include/gpio.h index daf602977d..9fe854be26 100644 --- a/src/include/gpio.h +++ b/src/include/gpio.h @@ -14,6 +14,7 @@ _Static_assert(sizeof(gpio_t) <= sizeof(u32), "gpio_t doesn't fit in lb_gpio"); /* The following functions must be implemented by SoC/board code. */ int gpio_get(gpio_t gpio); +int gpio_tx_get(gpio_t gpio); void gpio_set(gpio_t gpio, int value); void gpio_input_pulldown(gpio_t gpio); void gpio_input_pullup(gpio_t gpio); diff --git a/src/soc/intel/common/block/gpio/gpio.c b/src/soc/intel/common/block/gpio/gpio.c index 4b27f3074c..08fce94be4 100644 --- a/src/soc/intel/common/block/gpio/gpio.c +++ b/src/soc/intel/common/block/gpio/gpio.c @@ -523,6 +523,18 @@ int gpio_get(gpio_t gpio_num) return !!(reg & PAD_CFG0_RX_STATE); } +int gpio_tx_get(gpio_t gpio_num) +{ + const struct pad_community *comm = gpio_get_community(gpio_num); + uint16_t config_offset; + uint32_t reg; + + config_offset = pad_config_offset(comm, gpio_num); + reg = pcr_read32(comm->port, config_offset); + + return !!(reg & PAD_CFG0_TX_STATE); +} + static void gpio_pad_config_lock_using_sbi(const struct gpio_lock_config *pad_info, uint8_t pid, uint16_t offset, const uint32_t bit_mask) |