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authorFelix Singer <felixsinger@posteo.net>2023-05-04 00:39:54 +0200
committerFelix Singer <service+coreboot-gerrit@felixsinger.de>2023-05-05 00:12:07 +0000
commit51d8b25984381c8fe51d3f63186edf7d3ef0576c (patch)
tree410ffda88e0265588e85419f5404003fa8b8992e
parent1d8763806cae2b580953175dc3c06e1c2903e587 (diff)
soc/intel/spr: Fix copy paste issue in error messages
The commit a0b199c6b483 ("soc/intel/xeon_sp/spr: Add soc set_cmos_mrc_cold_boot_flag") introduced a copy-paste issue in two error messages. The error messages should mention the Intel platform SPR instead of CPX. Fix that. Change-Id: I4de61ec2cf9fbd98263a7a7a588938d548148656 Signed-off-by: Felix Singer <felixsinger@posteo.net> Reviewed-on: https://review.coreboot.org/c/coreboot/+/74956 Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Johnny Lin <Johnny_Lin@wiwynn.com> Reviewed-by: Lean Sheng Tan <sheng.tan@9elements.com>
-rw-r--r--src/soc/intel/xeon_sp/spr/include/soc/soc_util.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h b/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h
index e1ed41458b..2028dfafe2 100644
--- a/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h
+++ b/src/soc/intel/xeon_sp/spr/include/soc/soc_util.h
@@ -18,10 +18,10 @@
#if CONFIG(USE_OPTION_TABLE)
#include "option_table.h"
#if CMOS_VSTART_mrc_status != CMOS_OFFSET_MRC_STATUS * 8
-#error "CMOS start for CPX-SP MRC status byte is not correct, check your cmos.layout"
+#error "CMOS start for SPR-SP MRC status byte is not correct, check your cmos.layout"
#endif
#if CMOS_VLEN_mrc_status != 8
-#error "CMOS length for CPX-SP MRC status byte is not correct, check your cmos.layout"
+#error "CMOS length for SPR-SP MRC status byte is not correct, check your cmos.layout"
#endif
#endif