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authorRaul E Rangel <rrangel@chromium.org>2022-03-16 11:30:19 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-03-18 15:10:48 +0000
commit4fdcefc9f6901f03130e2addf8714d3549730e09 (patch)
tree906d56d90a01539e8736dfdbf847d3c52775860a
parent7496392bd914e8aa4029e3410ee2ecd95a93bbe7 (diff)
mb/google/skyrim: Fix I2C voltages
Needed so i2c communication works. BUG=b:224618411 TEST=build skyrim Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I8ec7c18cae509b5683cb73153fd6d3747cf9d753 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62874 Reviewed-by: Jon Murphy <jpmurphy@google.com> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/skyrim/variants/baseboard/devicetree.cb6
1 files changed, 6 insertions, 0 deletions
diff --git a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
index 61bc93d8a8..7d4fb7f549 100644
--- a/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/skyrim/variants/baseboard/devicetree.cb
@@ -41,6 +41,12 @@ chip soc/amd/sabrina
register "i2c_scl_reset" = "GPIO_I2C0_SCL | GPIO_I2C1_SCL |
GPIO_I2C2_SCL | GPIO_I2C3_SCL"
+ # I2C Pad Control RX Select Configuration
+ register "i2c_pad[0].rx_level" = "I2C_PAD_RX_1_8V" # Touchpad
+ register "i2c_pad[1].rx_level" = "I2C_PAD_RX_1_8V" # Touchscreen
+ register "i2c_pad[2].rx_level" = "I2C_PAD_RX_1_8V" # Audio/SAR
+ register "i2c_pad[3].rx_level" = "I2C_PAD_RX_1_8V" # GSC
+
device domain 0 on
device ref lpc_bridge on
chip ec/google/chromeec