diff options
| author | Edward O'Callaghan <quasisec@google.com> | 2020-03-23 11:01:08 +1100 |
|---|---|---|
| committer | Edward O'Callaghan <quasisec@chromium.org> | 2020-03-24 00:40:10 +0000 |
| commit | 4bd69273882c66667590f098f2b9bb916b6c1a44 (patch) | |
| tree | d27cd2d6a275870600298e30bb1ae04937a7c2f5 | |
| parent | c632bda2f6fe9dad5da4118ea9bb762a8eff1583 (diff) | |
mb/google/hatch: Give first NIC in Puff idx 1 for vpd
The format for VPD has changed s.t. the first NIC should
always have a zero concat to the end. drivers/net supports
this with the workaround of setting the idx to 1.
The longer term fix is to adjust all the respective boards
to shift back by one and adjust drivers/net friends to
remove the 'special casing' of idx == 0.
Background:
https://chromeos.google.com/partner/dlm/docs/factory/vpd.html#field-ethernet_macn
BUG=b:152157720
BRANCH=none
TEST=none
Change-Id: I510428c555b92398a5199b346dffb85d38495d74
Signed-off-by: Edward O'Callaghan <quasisec@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39768
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Sam McNally <sammc@google.com>
Reviewed-by: Furquan Shaikh <furquan@google.com>
| -rw-r--r-- | src/mainboard/google/hatch/variants/puff/overridetree.cb | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/mainboard/google/hatch/variants/puff/overridetree.cb b/src/mainboard/google/hatch/variants/puff/overridetree.cb index cca2d41ce3..d8df2980ec 100644 --- a/src/mainboard/google/hatch/variants/puff/overridetree.cb +++ b/src/mainboard/google/hatch/variants/puff/overridetree.cb @@ -283,6 +283,7 @@ chip soc/intel/cannonlake register "stop_delay_ms" = "12" # NIC needs time to quiesce register "stop_off_delay_ms" = "1" register "has_power_resource" = "1" + register "device_index" = "1" device pci 00.0 on end end end # FSP requires func0 be enabled. |