diff options
| author | Eric Lai <ericr_lai@compal.corp-partner.google.com> | 2021-04-06 11:41:56 +0800 |
|---|---|---|
| committer | Martin Roth <martinroth@google.com> | 2021-04-07 15:16:37 +0000 |
| commit | 4bc6adcb9345f2fdf14eaa30aa77382b46525def (patch) | |
| tree | 76db866e308a0c775aae535d9cef2237922817e2 | |
| parent | 92d7fd552715a20c82c86cdcadd14d708c2c8004 (diff) | |
mb/google/mancomb: Enable PCIe devices in devicetree
BUG=b:182211161
TEST=builds
Signed-off-by: Eric Lai <ericr_lai@compal.corp-partner.google.com>
Change-Id: Id6c20b32ddafe415132ce70abf5381ff3aad13f7
Reviewed-on: https://review.coreboot.org/c/coreboot/+/52118
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Raul Rangel <rrangel@chromium.org>
| -rw-r--r-- | src/mainboard/google/mancomb/variants/baseboard/devicetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb index c4ef3f546b..305ba0b577 100644 --- a/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/mancomb/variants/baseboard/devicetree.cb @@ -39,6 +39,11 @@ chip soc/amd/cezanne }" device domain 0 on + device ref gpp_bridge_0 on end # WLAN + device ref gpp_bridge_1 on end # SD + device ref gpp_bridge_2 on end # LAN + device ref gpp_bridge_3 on end # NVMe + device ref gpp_bridge_a on # Internal GPP Bridge 0 to Bus A device ref gfx on end # Internal GPU (GFX) end |