diff options
| author | Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> | 2024-06-03 17:59:49 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2024-06-07 18:41:37 +0000 |
| commit | 49acc32cba994b0b663aca034e114abffd914a6f (patch) | |
| tree | cd612c2dd705e43908314db1fdd0e36148d39663 | |
| parent | f90d5d8820f39b3c22a8ff48141154f3ccfda06c (diff) | |
mb/google/brox/var/brox: update thermal settings to start fan early
Current existing temperature thresholds of TSR1 sensor are set at 60C
to start fan. Due to this CPU gets hot and temperature goes over 80C.
In this situation, fan does not even start to lower down CPU temperature.
With updated new settings based on tuning from thermal team, start fan
early at 40C for TSR0 and TSR1 so the CPU temperature stays below 80C.
BUG=b:339493551
TEST=Built and tested on google/brox board
Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com>
Change-Id: I4765c13c10e436733d8c9d017085968daa561ccc
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82784
Reviewed-by: Eric Lai <ericllai@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
| -rw-r--r-- | src/mainboard/google/brox/variants/brox/overridetree.cb | 38 |
1 files changed, 31 insertions, 7 deletions
diff --git a/src/mainboard/google/brox/variants/brox/overridetree.cb b/src/mainboard/google/brox/variants/brox/overridetree.cb index abb551de17..424d61c6cb 100644 --- a/src/mainboard/google/brox/variants/brox/overridetree.cb +++ b/src/mainboard/google/brox/variants/brox/overridetree.cb @@ -36,18 +36,42 @@ chip soc/intel/alderlake register "options.tsr[0].desc" = ""DRAM_SOC"" register "options.tsr[1].desc" = ""Fan-Inlet"" - # TODO: below values are initial reference values only ## Active Policy register "policies.active" = "{ [0] = { + .target = DPTF_CPU, + .thresholds = { + TEMP_PCT(95, 90), + TEMP_PCT(92, 80), + TEMP_PCT(89, 60), + TEMP_PCT(85, 40), + TEMP_PCT(80, 30), + } + }, + [1] = { + .target = DPTF_TEMP_SENSOR_0, + .thresholds = { + TEMP_PCT(54, 95), + TEMP_PCT(52, 90), + TEMP_PCT(50, 80), + TEMP_PCT(48, 50), + TEMP_PCT(46, 30), + TEMP_PCT(44, 25), + TEMP_PCT(42, 20), + TEMP_PCT(40, 15), + } + }, + [2] = { .target = DPTF_TEMP_SENSOR_1, .thresholds = { - TEMP_PCT(85, 90), - TEMP_PCT(80, 80), - TEMP_PCT(75, 70), - TEMP_PCT(70, 60), - TEMP_PCT(65, 50), - TEMP_PCT(60, 40), + TEMP_PCT(54, 95), + TEMP_PCT(52, 90), + TEMP_PCT(50, 80), + TEMP_PCT(48, 50), + TEMP_PCT(46, 30), + TEMP_PCT(44, 25), + TEMP_PCT(42, 20), + TEMP_PCT(40, 15), } } }" |