diff options
author | Wisley Chen <wisley.chen@quanta.corp-partner.google.com> | 2023-07-24 08:34:35 +0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-26 13:26:25 +0000 |
commit | 48c1bf491bbafb252b05df68c72d18fc93ac0d24 (patch) | |
tree | 4e4cc19a1a0e7353a2ce59b004242228852db8aa | |
parent | 2d2815a7c224195e21e15c3e35c5343381918539 (diff) |
mb/google/brya/var/redrix: Disable PCH USB2 phy power gating
The patch disables PCH USB2 Phy power gating to prevent possible display
flicker issue for redrix board. Please refer Intel doc#723158 for
more information.
BUG=b:292435264
TEST=build and boot redrix
Change-Id: I34d10c763f4710d2c5678704320fd1cc8d8b6287
Signed-off-by: Wisley Chen <wisley.chen@quanta.corp-partner.google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76670
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/mainboard/google/brya/variants/redrix/overridetree.cb | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/brya/variants/redrix/overridetree.cb b/src/mainboard/google/brya/variants/redrix/overridetree.cb index d70871412a..26b15e2764 100644 --- a/src/mainboard/google/brya/variants/redrix/overridetree.cb +++ b/src/mainboard/google/brya/variants/redrix/overridetree.cb @@ -32,6 +32,11 @@ fw_config end chip soc/intel/alderlake register "sagv" = "SaGv_Enabled" + + # As per Intel Advisory doc#723158, the change is required to prevent possible + # display flickering issue. + register "usb2_phy_sus_pg_disable" = "1" + register "cnvi_bt_audio_offload" = "true" # FIVR RFI Spread Spectrum 6% register "fivr_spread_spectrum" = "FIVR_SS_6" |