mb/*/*/devicetree.cb: Normalize disabled PIRQ values

If bit 7 of a PIRQ route is set, it is disabled. Modern OSes don't use
PIRQ routing, so we might as well zero the other bits for consistency.

Tested on Asrock B85M Pro4 with SeaBIOS 1.13.0, still boots.

Change-Id: I78980b9ea5e878a6200df0f6c18c5e7d06a7950a
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/43861
Reviewed-by: Nico Huber <nico.h@gmx.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>

12 files changed, 57 insertions, 57 deletions

diff --git a/src/mainboard/asrock/b85m_pro4/devicetree.cb b/src/mainboard/asrock/b85m_pro4/devicetree.cb
index a044d0a8a3..b724652ea6 100644
--- a/src/mainboard/asrock/b85m_pro4/devicetree.cb
+++ b/src/mainboard/asrock/b85m_pro4/devicetree.cb
@@ -27,14 +27,14 @@ chip northbridge/intel/haswell
 
 		chip southbridge/intel/lynxpoint
 			register "gen1_dec"      = "0x000c0291"	# Super I/O HWM
-			register "pirqa_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
 			register "pirqb_routing" = "0x80"
-			register "pirqc_routing" = "0x83"
-			register "pirqd_routing" = "0x8a"
-			register "pirqe_routing" = "0x83"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
+			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
-			register "pirqg_routing" = "0x8b"
-			register "pirqh_routing" = "0x8a"
+			register "pirqg_routing" = "0x80"
+			register "pirqh_routing" = "0x80"
 			register "sata_ahci"     = "1"
 			register "sata_port_map" = "0x3f"
 
diff --git a/src/mainboard/asrock/h81m-hds/devicetree.cb b/src/mainboard/asrock/h81m-hds/devicetree.cb
index f08d2d560f..561c1e35d5 100644
--- a/src/mainboard/asrock/h81m-hds/devicetree.cb
+++ b/src/mainboard/asrock/h81m-hds/devicetree.cb
@@ -35,14 +35,14 @@ chip northbridge/intel/haswell
 		end
 
 		chip southbridge/intel/lynxpoint
-			register "pirqa_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
 			register "pirqb_routing" = "0x80"
-			register "pirqc_routing" = "0x8b"
-			register "pirqd_routing" = "0x8a"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
-			register "pirqh_routing" = "0x8a"
+			register "pirqh_routing" = "0x80"
 
 			register "sata_ahci" = "1"
 			register "sata_port_map" = "0x33"
diff --git a/src/mainboard/asus/p5gc-mx/devicetree.cb b/src/mainboard/asus/p5gc-mx/devicetree.cb
index 4c26925838..172f65f653 100644
--- a/src/mainboard/asus/p5gc-mx/devicetree.cb
+++ b/src/mainboard/asus/p5gc-mx/devicetree.cb
@@ -25,14 +25,14 @@ chip northbridge/intel/i945
 		end
 
 		chip southbridge/intel/i82801gx
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x86"
-			register "pirqd_routing" = "0x85"
-			register "pirqe_routing" = "0x83"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
+			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
-			register "pirqh_routing" = "0x85"
+			register "pirqh_routing" = "0x80"
 
 			register "gpe0_en" = "0"
 
diff --git a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
index d6f1f5329b..c0f198f4e7 100644
--- a/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
+++ b/src/mainboard/gigabyte/ga-945gcm-s2l/devicetree.cb
@@ -27,14 +27,14 @@ chip northbridge/intel/i945
 		end
 
 		chip southbridge/intel/i82801gx
-			register "pirqa_routing" = "0x8c"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x83"
-			register "pirqd_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
-			register "pirqh_routing" = "0x85"
+			register "pirqh_routing" = "0x80"
 
 			# GPI routing
 			#  0 No effect (default)
diff --git a/src/mainboard/google/auron/devicetree.cb b/src/mainboard/google/auron/devicetree.cb
index a84aa98eeb..65d4ce9c47 100644
--- a/src/mainboard/google/auron/devicetree.cb
+++ b/src/mainboard/google/auron/devicetree.cb
@@ -15,10 +15,10 @@ chip soc/intel/broadwell
 	# Set backlight PWM value for eDP
 	register "gpu_pch_backlight_pwm_hz" = "200"
 
-	register "pirqa_routing" = "0x8b"
-	register "pirqb_routing" = "0x8a"
-	register "pirqc_routing" = "0x8b"
-	register "pirqd_routing" = "0x8b"
+	register "pirqa_routing" = "0x80"
+	register "pirqb_routing" = "0x80"
+	register "pirqc_routing" = "0x80"
+	register "pirqd_routing" = "0x80"
 	register "pirqe_routing" = "0x80"
 	register "pirqf_routing" = "0x80"
 	register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/google/beltino/devicetree.cb b/src/mainboard/google/beltino/devicetree.cb
index 304f3cf38f..171b93f81d 100644
--- a/src/mainboard/google/beltino/devicetree.cb
+++ b/src/mainboard/google/beltino/devicetree.cb
@@ -36,10 +36,10 @@ chip northbridge/intel/haswell
 		device pci 03.0 on end # mini-hd audio
 
 		chip southbridge/intel/lynxpoint
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x8b"
-			register "pirqd_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/google/jecht/devicetree.cb b/src/mainboard/google/jecht/devicetree.cb
index 19d0c48e07..4856cca65a 100644
--- a/src/mainboard/google/jecht/devicetree.cb
+++ b/src/mainboard/google/jecht/devicetree.cb
@@ -9,10 +9,10 @@ chip soc/intel/broadwell
 	# Enable HDMI Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
-	register "pirqa_routing" = "0x8b"
-	register "pirqb_routing" = "0x8a"
-	register "pirqc_routing" = "0x8b"
-	register "pirqd_routing" = "0x8b"
+	register "pirqa_routing" = "0x80"
+	register "pirqb_routing" = "0x80"
+	register "pirqc_routing" = "0x80"
+	register "pirqd_routing" = "0x80"
 	register "pirqe_routing" = "0x80"
 	register "pirqf_routing" = "0x80"
 	register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/google/slippy/devicetree.cb b/src/mainboard/google/slippy/devicetree.cb
index e22a41ebc2..bbb22ca9f0 100644
--- a/src/mainboard/google/slippy/devicetree.cb
+++ b/src/mainboard/google/slippy/devicetree.cb
@@ -40,10 +40,10 @@ chip northbridge/intel/haswell
 		device pci 03.0 on end # mini-hd audio
 
 		chip southbridge/intel/lynxpoint
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x8b"
-			register "pirqd_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/intel/baskingridge/devicetree.cb b/src/mainboard/intel/baskingridge/devicetree.cb
index 157f393454..8ea8e97c61 100644
--- a/src/mainboard/intel/baskingridge/devicetree.cb
+++ b/src/mainboard/intel/baskingridge/devicetree.cb
@@ -32,10 +32,10 @@ chip northbridge/intel/haswell
 		device pci 02.0 on end # vga controller
 
 		chip southbridge/intel/lynxpoint # Intel Series 8 Lynx Point PCH
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x8b"
-			register "pirqd_routing" = "0x8b"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/intel/wtm2/devicetree.cb b/src/mainboard/intel/wtm2/devicetree.cb
index 8d36f04d54..88c033ea4d 100644
--- a/src/mainboard/intel/wtm2/devicetree.cb
+++ b/src/mainboard/intel/wtm2/devicetree.cb
@@ -9,10 +9,10 @@ chip soc/intel/broadwell
 	# Enable DVI Hotplug with 6ms pulse
 	register "gpu_dp_b_hotplug" = "0x06"
 
-	register "pirqa_routing" = "0x8b"
-	register "pirqb_routing" = "0x8a"
-	register "pirqc_routing" = "0x8b"
-	register "pirqd_routing" = "0x8b"
+	register "pirqa_routing" = "0x80"
+	register "pirqb_routing" = "0x80"
+	register "pirqc_routing" = "0x80"
+	register "pirqd_routing" = "0x80"
 	register "pirqe_routing" = "0x80"
 	register "pirqf_routing" = "0x80"
 	register "pirqg_routing" = "0x80"
diff --git a/src/mainboard/lenovo/t440p/devicetree.cb b/src/mainboard/lenovo/t440p/devicetree.cb
index 58f0ca82a1..e8f8a1a396 100644
--- a/src/mainboard/lenovo/t440p/devicetree.cb
+++ b/src/mainboard/lenovo/t440p/devicetree.cb
@@ -38,14 +38,14 @@ chip northbridge/intel/haswell
 			register "gen4_dec" = "0x000c06a1"
 			register "gpi13_routing" = "2"
 			register "gpi1_routing" = "2"
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x8a"
-			register "pirqd_routing" = "0x89"
-			register "pirqe_routing" = "0x86"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
+			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
-			register "pirqg_routing" = "0x8b"
-			register "pirqh_routing" = "0x87"
+			register "pirqg_routing" = "0x80"
+			register "pirqh_routing" = "0x80"
 			register "sata_ahci" = "1"
 			# 0(HDD), 1(M.2), 5(ODD)
 			register "sata_port_map" = "0x23"
diff --git a/src/mainboard/supermicro/x10slm-f/devicetree.cb b/src/mainboard/supermicro/x10slm-f/devicetree.cb
index a2514ad03c..80e79d8682 100644
--- a/src/mainboard/supermicro/x10slm-f/devicetree.cb
+++ b/src/mainboard/supermicro/x10slm-f/devicetree.cb
@@ -26,14 +26,14 @@ chip northbridge/intel/haswell
 		device pci 03.0 off end # Mini-HD audio
 
 		chip southbridge/intel/lynxpoint
-			register "pirqa_routing" = "0x8b"
-			register "pirqb_routing" = "0x8a"
-			register "pirqc_routing" = "0x8b"
-			register "pirqd_routing" = "0x8a"
+			register "pirqa_routing" = "0x80"
+			register "pirqb_routing" = "0x80"
+			register "pirqc_routing" = "0x80"
+			register "pirqd_routing" = "0x80"
 			register "pirqe_routing" = "0x80"
 			register "pirqf_routing" = "0x80"
 			register "pirqg_routing" = "0x80"
-			register "pirqh_routing" = "0x85"
+			register "pirqh_routing" = "0x80"
 
 			register "sata_ahci" = "1"
 			register "sata_port_map" = "0x3f"