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authorEran Mitrani <mitrani@google.com>2023-11-30 10:59:56 -0800
committerMatt DeVillier <matt.devillier@amd.corp-partner.google.com>2023-12-04 15:52:31 +0000
commit3bad203be1e549158e5b5e25c131f342e9b156d6 (patch)
tree975aea59a5f50a002c97e892e9843e32c6fecb86
parentc2aa756ca141359afc7971f647aa38aacb4e0ec8 (diff)
mb/google/rex/variants/deku: Add basic DTT
Add default Intel DPTF. BUG=b:305793886 TEST=util/abuild/abuild -p none -t google/rex -x -a -b deku Signed-off-by: Eran Mitrani <mitrani@google.com> Change-Id: Id681754fc8e7b418de35f66df097cadd4aad7448 Signed-off-by: Eran Mitrani <mitrani@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/79353 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/mainboard/google/rex/variants/deku/overridetree.cb5
1 files changed, 5 insertions, 0 deletions
diff --git a/src/mainboard/google/rex/variants/deku/overridetree.cb b/src/mainboard/google/rex/variants/deku/overridetree.cb
index 35ce9b4654..1163292046 100644
--- a/src/mainboard/google/rex/variants/deku/overridetree.cb
+++ b/src/mainboard/google/rex/variants/deku/overridetree.cb
@@ -55,6 +55,11 @@ chip soc/intel/meteorlake
}"
device domain 0 on
+ device ref dtt on
+ chip drivers/intel/dptf
+ device generic 0 alias dptf_policy on end
+ end
+ end
device ref pcie_rp7 on
# Enable LAN1 Card PCIE 7 using clk 2
register "pcie_rp[PCH_RP(7)]" = "{