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authorSubrata Banik <subrata.banik@intel.com>2021-10-27 20:53:49 +0530
committerSubrata Banik <subrata.banik@intel.com>2021-10-30 18:44:19 +0000
commit3afa467a880392f4dbbbc69373eb555731e738b4 (patch)
tree53300cb8e7f8f78964ad4642b77588818f70f481
parentacbbbede42dd00f93d8b39603dc7c052b389c43f (diff)
lib: Use `smbios_bus_width_to_spd_width` for setting dimm.bus_width
Make use of `smbios_bus_width_to_spd_width()` for filling DIMM info. Additionally, ensures dimm_info_util.c file is getting compiled for romstage. TEST=dmidecode -t 17 output Total Width and Data Width as expected. Change-Id: I7fdc19fadc576dec43e12f182fe088707e6654d9 Signed-off-by: Subrata Banik <subrata.banik@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/58655 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/lib/Makefile.inc1
-rw-r--r--src/soc/intel/common/smbios.c29
2 files changed, 9 insertions, 21 deletions
diff --git a/src/lib/Makefile.inc b/src/lib/Makefile.inc
index 8da875e255..693a526b66 100644
--- a/src/lib/Makefile.inc
+++ b/src/lib/Makefile.inc
@@ -110,6 +110,7 @@ romstage-$(CONFIG_COLLECT_TIMESTAMPS) += timestamp.c
romstage-$(CONFIG_CONSOLE_CBMEM) += cbmem_console.c
romstage-y += compute_ip_checksum.c
+romstage-y += dimm_info_util.c
ifeq ($(CONFIG_COMPILER_GCC),y)
bootblock-$(CONFIG_ARCH_BOOTBLOCK_X86_32) += gcc.c
verstage-$(CONFIG_ARCH_VERSTAGE_X86_32) += gcc.c
diff --git a/src/soc/intel/common/smbios.c b/src/soc/intel/common/smbios.c
index 9cbdecb5e0..a2b4a0be0d 100644
--- a/src/soc/intel/common/smbios.c
+++ b/src/soc/intel/common/smbios.c
@@ -6,6 +6,9 @@
#include <commonlib/helpers.h>
#include <console/console.h>
#include <device/dram/ddr3.h>
+#include <dimm_info_util.h>
+
+#define EXTENSION_BUS_WIDTH_8BITS 8
/* Fill the SMBIOS memory information from FSP MEM_INFO_DATA_HOB in CBMEM.*/
void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
@@ -56,27 +59,11 @@ void dimm_info_fill(struct dimm_info *dimm, u32 dimm_capacity, u8 ddr_type,
if (module_serial_num)
memcpy(dimm->serial, module_serial_num,
DIMM_INFO_SERIAL_SIZE);
- switch (data_width) {
- case 8:
- dimm->bus_width = MEMORY_BUS_WIDTH_8;
- break;
- case 16:
- dimm->bus_width = MEMORY_BUS_WIDTH_16;
- break;
- case 32:
- dimm->bus_width = MEMORY_BUS_WIDTH_32;
- break;
- case 64:
- dimm->bus_width = MEMORY_BUS_WIDTH_64;
- break;
- case 128:
- dimm->bus_width = MEMORY_BUS_WIDTH_128;
- break;
- default:
- printk(BIOS_NOTICE, "Incorrect DIMM Data width: %u\n",
- (unsigned int)data_width);
- }
+
+ uint16_t total_width = data_width;
if (ecc_support)
- dimm->bus_width |= 0x8;
+ total_width += EXTENSION_BUS_WIDTH_8BITS;
+
+ dimm->bus_width = smbios_bus_width_to_spd_width(total_width, data_width);
}