Drop CONFIG_AP_CODE_IN_CAR

This option has not been enabled on any board and was considered
obsolete last time it was touched. If we need the functionality,
let's fix this in a generic way instead of a K8 specific way.
This was mostly a speedup hack back in the day.

Change-Id: Ib1ca248c56a7f6e9d0c986c35d131d5f444de0d8
Signed-off-by: Stefan Reinauer <reinauer@google.com>
Reviewed-on: http://review.coreboot.org/3211
Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
Tested-by: build bot (Jenkins)

15 files changed, 0 insertions, 800 deletions

diff --git a/src/Kconfig b/src/Kconfig
index ce7f400c79..ce5a048bcc 100644
--- a/src/Kconfig
+++ b/src/Kconfig
@@ -943,10 +943,6 @@ config DEBUG_COVERAGE
 endmenu
 
 # These probably belong somewhere else, but they are needed somewhere.
-config AP_CODE_IN_CAR
-	bool
-	default n
-
 config RAMINIT_SYSINFO
 	bool
 	default n
diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc
index ee2bc4713d..62f7a3f29a 100644
--- a/src/arch/x86/Makefile.inc
+++ b/src/arch/x86/Makefile.inc
@@ -48,9 +48,6 @@ endif
 ifeq ($(CONFIG_PAYLOAD_FILO),y)
 COREBOOT_ROM_DEPENDENCIES+=filo
 endif
-ifeq ($(CONFIG_AP_CODE_IN_CAR),y)
-COREBOOT_ROM_DEPENDENCIES+=$(objcbfs)/coreboot_ap.elf
-endif
 
 extract_nth=$(word $(1), $(subst |, ,$(2)))
 
@@ -79,10 +76,6 @@ endif
 $(obj)/coreboot.rom: $(obj)/coreboot.pre $(objcbfs)/coreboot_ram.elf $(CBFSTOOL) $(call strip_quotes,$(COREBOOT_ROM_DEPENDENCIES)) $$(INTERMEDIATE) $$(VBOOT_STUB_ELF)
 	@printf "    CBFS       $(subst $(obj)/,,$(@))\n"
 	cp $(obj)/coreboot.pre $@.tmp
-	if [ -f $(objcbfs)/coreboot_ap.elf ]; \
-	then \
-		$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ap.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ap -c $(CBFS_COMPRESS_FLAG); \
-	fi
 	$(CBFSTOOL) $@.tmp add-stage -f $(objcbfs)/coreboot_ram.elf -n $(CONFIG_CBFS_PREFIX)/coreboot_ram -c $(CBFS_COMPRESS_FLAG)
 ifeq ($(CONFIG_PAYLOAD_NONE),y)
 	@printf "    PAYLOAD    none (as specified by user)\n"
@@ -188,17 +181,6 @@ else
 endif
 
 ################################################################################
-# Ramstage for AP CPU (AMD K8, obsolete?)
-
-$(objcbfs)/coreboot_ap.debug: $(objgenerated)/coreboot_ap.o $(src)/arch/x86/init/ldscript_apc.lb
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -nostdlib -nostartfiles -static -o $@ -L$(obj) -T $(src)/arch/x86/init/ldscript_apc.lb $<
-
-$(objgenerated)/coreboot_ap.o: $(src)/mainboard/$(MAINBOARDDIR)/ap_romstage.c $(OPTION_TABLE_H)
-	@printf "    CC         $(subst $(obj)/,,$(@))\n"
-	$(CC) -MMD $(CFLAGS) -I$(src) -D__PRE_RAM__ -I. -I$(obj) -c $< -o $@
-
-################################################################################
 # done
 
 crt0s = $(src)/arch/x86/init/prologue.inc
diff --git a/src/arch/x86/init/ldscript_apc.lb b/src/arch/x86/init/ldscript_apc.lb
deleted file mode 100644
index 1c64c69551..0000000000
--- a/src/arch/x86/init/ldscript_apc.lb
+++ /dev/null
@@ -1,31 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2006 Advanced Micro Devices, Inc.
- * Copyright (C) 2008-2010 coresystems GmbH
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; version 2 of the License.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-INCLUDE "ldoptions"
-SECTIONS
-{
-        .apcrom . : {
-                _apcrom = .;
-		*(.text)
-		*(.rodata)
-		*(.rodata.*)
-                _eapcrom = .;
-        }
-}
diff --git a/src/arch/x86/lib/cbfs_and_run.c b/src/arch/x86/lib/cbfs_and_run.c
index a13b04ef28..6379842563 100644
--- a/src/arch/x86/lib/cbfs_and_run.c
+++ b/src/arch/x86/lib/cbfs_and_run.c
@@ -44,10 +44,3 @@ void asmlinkage copy_and_run(void)
 {
 	cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram");
 }
-
-#if CONFIG_AP_CODE_IN_CAR
-void asmlinkage copy_and_run_ap_code_in_car(unsigned ret_addr)
-{
-	cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ap", ret_addr);
-}
-#endif
diff --git a/src/mainboard/amd/serengeti_cheetah/Kconfig b/src/mainboard/amd/serengeti_cheetah/Kconfig
index 26fa45f2be..b26803e3ff 100644
--- a/src/mainboard/amd/serengeti_cheetah/Kconfig
+++ b/src/mainboard/amd/serengeti_cheetah/Kconfig
@@ -17,7 +17,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
 	select LIFT_BSP_APIC_ID
-	#select AP_CODE_IN_CAR
 	select SB_HT_CHAIN_UNITID_OFFSET_ONLY
 	select WAIT_BEFORE_CPUS_INIT
 	select HAVE_ACPI_TABLES
diff --git a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c b/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
deleted file mode 100644
index fa680fe3cc..0000000000
--- a/src/mainboard/amd/serengeti_cheetah/ap_romstage.c
+++ /dev/null
@@ -1,74 +0,0 @@
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include "console/console.c"
-#include "lib/uart8250.c"
-#include "console/vtxprintf.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/amd/amd8111/amd8111_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-static inline unsigned get_nodes(void)
-{
-	return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
-}
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-	struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-        printk(BIOS_DEBUG, "CODE IN CACHE ON NODE: %02x\n", id.nodeid);
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-	 * go back, but can not use stack any more, because we
-	 * only keep ret_addr and can not restore esp, and ebp.
-	 */
-
-        __asm__ volatile (
-                "movl  %0, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-                :: "a"(ret_addr)
-        );
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-        do {
-                hlt();
-        } while(1);
-}
-
diff --git a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c b/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
deleted file mode 100644
index 9def81d7ac..0000000000
--- a/src/mainboard/gigabyte/ga_2761gxdk/ap_romstage.c
+++ /dev/null
@@ -1,99 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- * Copyright (C) 2007 Silicon Integrated Systems Corp. (SiS)
- * Written by Morgan Tsai <my_tsai@sis.com> for SiS.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-
-#include "lib/uart8250.c"
-#include "arch/x86/lib/printk_init.c"
-#include "console/vtxprintf.c"
-#include "console/console.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/sis/sis966/sis966_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-        struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-	//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
-        print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-		go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
-	*/
-
-        __asm__ volatile (
-                "movl  %0, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-                :: "a"(ret_addr)
-        );
-
-
-
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-        do {
-                hlt();
-        } while(1);
-}
-
-
diff --git a/src/mainboard/gigabyte/m57sli/ap_romstage.c b/src/mainboard/gigabyte/m57sli/ap_romstage.c
deleted file mode 100644
index df00eed17e..0000000000
--- a/src/mainboard/gigabyte/m57sli/ap_romstage.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-
-#include "lib/uart8250.c"
-#include "arch/x86/lib/printk_init.c"
-#include "console/vtxprintf.c"
-#include "console/console.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-        struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-	//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
-        print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-		go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
-	*/
-
-        __asm__ volatile (
-                "movl  %0, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-                :: "a"(ret_addr)
-        );
-
-
-
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-        do {
-                hlt();
-        } while(1);
-}
-
-
diff --git a/src/mainboard/msi/ms7260/ap_romstage.c b/src/mainboard/msi/ms7260/ap_romstage.c
deleted file mode 100644
index f0a3dc4af5..0000000000
--- a/src/mainboard/msi/ms7260/ap_romstage.c
+++ /dev/null
@@ -1,82 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * (Written by Yinghai Lu <yinghailu@amd.com> for AMD)
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include "lib/uart8259.c"
-
-#include "console/console.c"
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-#include "lib/delay.c"
-/* #include "cpu/x86/lapic/boot_cpu.c" */
-#include "northbridge/amd/amdk8/reset_test.c"
-#include "northbridge/amd/amdk8/debug.c"
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-#include "northbridge/amd/amdk8/amdk8_f.h"
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; /* in CACHE */
-	struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); /* in RAM */
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-	/* FIXME: For USBDEBUG you need to make sure dbg_info gets
-	 * assigned in AP.
-	 */
-	print_debug("CODE IN CACHE ON NODE:");
-	print_debug_hex8(id.nodeid);
-	print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/* Go back, but cannot use stack any more, because we only
-	 * keep ret_addr and can not restore esp, and ebp.
-	 */
-	__asm__ __volatile__(
-		"movl %0, %%edi\n\t"
-		"jmp *%%edi\n\t"
-		: : "a" (ret_addr)
-	);
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-	while (1)
-		hlt();
-}
diff --git a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c b/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
deleted file mode 100644
index 005de7bed6..0000000000
--- a/src/mainboard/nvidia/l1_2pvv/ap_romstage.c
+++ /dev/null
@@ -1,91 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include "lib/uart8250.c"
-#include "arch/x86/lib/printk_init.c"
-#include "console/vtxprintf.c"
-#include "console/console.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-	struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-	//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
-	print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-	 * go back, but can not use stack any more, because we only keep
-	 * ret_addr and can not restore esp, and ebp
-	 */
-
-	__asm__ volatile (
-		"movl  %0, %%edi\n\t"
-		"jmp     *%%edi\n\t"
-		:: "a"(ret_addr)
-	);
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-	do {
-		hlt();
-	} while(1);
-}
diff --git a/src/mainboard/supermicro/h8dme/Kconfig b/src/mainboard/supermicro/h8dme/Kconfig
index 221ccb2dbf..b8bd694208 100644
--- a/src/mainboard/supermicro/h8dme/Kconfig
+++ b/src/mainboard/supermicro/h8dme/Kconfig
@@ -15,7 +15,6 @@ config BOARD_SPECIFIC_OPTIONS # dummy
 	select HAVE_OPTION_TABLE
 	select HAVE_PIRQ_TABLE
 	select HAVE_MP_TABLE
-	#select AP_CODE_IN_CAR
 	select LIFT_BSP_APIC_ID
 	select BOARD_ROMSIZE_KB_1024
 	select RAMINIT_SYSINFO
diff --git a/src/mainboard/supermicro/h8dme/ap_romstage.c b/src/mainboard/supermicro/h8dme/ap_romstage.c
deleted file mode 100644
index ed2d16a781..0000000000
--- a/src/mainboard/supermicro/h8dme/ap_romstage.c
+++ /dev/null
@@ -1,97 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-
-#include "console/console.c"
-#include "lib/uart8250.c"
-#include "console/vtxprintf.c"
-#include "./arch/x86/lib/printk_init.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-static inline unsigned get_nodes(void)
-{
-	return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
-}
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-        struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-        print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-	 * go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
-	 */
-
-        __asm__ volatile (
-                "movl  %0, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-                :: "a"(ret_addr)
-        );
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-        do {
-                hlt();
-        } while(1);
-}
-
diff --git a/src/mainboard/supermicro/h8dmr/ap_romstage.c b/src/mainboard/supermicro/h8dmr/ap_romstage.c
deleted file mode 100644
index 8008bb25c9..0000000000
--- a/src/mainboard/supermicro/h8dmr/ap_romstage.c
+++ /dev/null
@@ -1,101 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-
-#include "console/console.c"
-#include "lib/uart8250.c"
-#include "console/vtxprintf.c"
-#include "./arch/x86/lib/printk_init.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-static inline unsigned get_nodes(void)
-{
-	return ((pci_read_config32(PCI_DEV(0, 0x18, 0), 0x60)>>4) & 7) + 1;
-}
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-        struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-        print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-		go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
-	*/
-
-        __asm__ volatile (
-                "movl  %0, %%edi\n\t"
-                "jmp     *%%edi\n\t"
-                :: "a"(ret_addr)
-        );
-
-
-
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-        do {
-                hlt();
-        } while(1);
-}
-
-
diff --git a/src/mainboard/tyan/s2912/ap_romstage.c b/src/mainboard/tyan/s2912/ap_romstage.c
deleted file mode 100644
index e22d2a5af4..0000000000
--- a/src/mainboard/tyan/s2912/ap_romstage.c
+++ /dev/null
@@ -1,89 +0,0 @@
-/*
- * This file is part of the coreboot project.
- *
- * Copyright (C) 2007 AMD
- * Written by Yinghai Lu <yinghailu@amd.com> for AMD.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License
- * along with this program; if not, write to the Free Software
- * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
- */
-
-#define K8_REV_F_SUPPORT_F0_F1_WORKAROUND 0
-
-#include <stdint.h>
-#include <device/pci_def.h>
-#include <device/pci_ids.h>
-#include <arch/io.h>
-#include <device/pnp_def.h>
-#include <cpu/x86/lapic.h>
-#include <pc80/mc146818rtc.h>
-#include "console/console.c"
-
-#include <cpu/amd/model_fxx_rev.h>
-#include "northbridge/amd/amdk8/raminit.h"
-
-#include "lib/delay.c"
-
-//#include "cpu/x86/lapic/boot_cpu.c"
-#include "northbridge/amd/amdk8/reset_test.c"
-
-#include "northbridge/amd/amdk8/debug.c"
-
-#include "southbridge/nvidia/mcp55/mcp55_early_ctrl.c"
-
-#include "northbridge/amd/amdk8/amdk8_f.h"
-
-#include "cpu/x86/mtrr.h"
-#include "cpu/amd/mtrr.h"
-#include "cpu/x86/tsc.h"
-
-#include "northbridge/amd/amdk8/amdk8_f_pci.c"
-#include "northbridge/amd/amdk8/raminit_f_dqs.c"
-
-#include "cpu/amd/dualcore/dualcore.c"
-
-void hardwaremain(int ret_addr)
-{
-	struct sys_info *sysinfo = &sysinfo_car; // in CACHE
-	struct sys_info *sysinfox = ((CONFIG_RAMTOP) - sizeof(*sysinfox)); // in RAM
-
-	struct node_core_id id;
-
-	id = get_node_core_id_x();
-
-	//FIXME: for USBDEBUG you need to make sure dbg_info get assigned in AP
-	print_debug("CODE IN CACHE ON NODE:"); print_debug_hex8(id.nodeid); print_debug("\n");
-
-	train_ram(id.nodeid, sysinfo, sysinfox);
-
-	/*
-		go back, but can not use stack any more, because we only keep ret_addr and can not restore esp, and ebp
-	*/
-
-	__asm__ volatile (
-		"movl  %0, %%edi\n\t"
-		"jmp     *%%edi\n\t"
-		:: "a"(ret_addr)
-	);
-}
-
-#include <arch/registers.h>
-
-void x86_exception(struct eregs *info)
-{
-	do {
-		hlt();
-	} while(1);
-}
-
diff --git a/src/northbridge/amd/amdk8/raminit_f_dqs.c b/src/northbridge/amd/amdk8/raminit_f_dqs.c
index a7a4538f30..08a3bab6c7 100644
--- a/src/northbridge/amd/amdk8/raminit_f_dqs.c
+++ b/src/northbridge/amd/amdk8/raminit_f_dqs.c
@@ -2103,16 +2103,8 @@ static inline void train_ram_on_node(unsigned nodeid, unsigned coreid, struct sy
 		memcpy(sysinfo, sysinfox, sizeof(*sysinfo));
 	#endif
 		set_top_mem_ap(sysinfo->tom_k, sysinfo->tom2_k); // keep the ap's tom consistent with bsp's
-	#if !CONFIG_AP_CODE_IN_CAR
 		printk(BIOS_DEBUG, "CODE IN ROM AND RUN ON NODE: %02x\n", nodeid);
 		train_ram(nodeid, sysinfo, sysinfox);
-	#else
-		/* Can copy dqs_timing to ap cache and run from cache?
-		* we need coreboot_ap_car.rom? and treat it as coreboot_ram.rom for ap ?
-		*/
-		copy_and_run_ap_code_in_car(retcall);
-		// will go back by jump
-	#endif
 	}
 }
 #endif