soc/intel/cannonlake: Add device Ids for new CFL SKUs support

- Add CPU, MCH & IGD IDs for new Coffeelake SKUs

- Add PCH, LPC, SPI IDs for CNP-H PCH CM246 & C246

- Make some minor alignments & naming corrections to align with the rest

TEST= build, boot to both Linux & windows OS on CFL H & S platforms
and verified all the device Id's in serial console logs.

Signed-off-by: Lean Sheng Tan <lean.sheng.tan@intel.com>
Change-Id: I343b11ea8d9c33eb189d7478511a473b145f4ab4
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34157
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Boon Tiong Teo <boon.tiong.teo@intel.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>

8 files changed, 78 insertions, 47 deletions

diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h
index 0c846c64d9..d014e58a1e 100644
--- a/src/include/device/pci_ids.h
+++ b/src/include/device/pci_ids.h
@@ -2730,6 +2730,7 @@
 #define PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC	0x9d83
 #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370	0xa306
 #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370	0xa30c
+#define PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246	0xa309
 #define PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246	0xa30e
 #define PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI	0x3480
 #define PCI_DEVICE_ID_INTEL_ICL_U_SUPER_U_ESPI_REV0	0x3481
@@ -3002,6 +3003,10 @@
 #define PCI_DEVICE_ID_INTEL_CNL_SPI1		0x9dab
 #define PCI_DEVICE_ID_INTEL_CNL_SPI2		0x9dfb
 #define PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI	0x9da4
+#define PCI_DEVICE_ID_INTEL_CNP_H_SPI0		0xa32a
+#define PCI_DEVICE_ID_INTEL_CNP_H_SPI1		0xa32b
+#define PCI_DEVICE_ID_INTEL_CNP_H_SPI2		0xa37b
+#define PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI	0xa324
 #define PCI_DEVICE_ID_INTEL_ICP_SPI0		0x34aa
 #define PCI_DEVICE_ID_INTEL_ICP_SPI1		0x34ab
 #define PCI_DEVICE_ID_INTEL_ICP_SPI2		0x34fb
@@ -3042,11 +3047,13 @@
 #define PCI_DEVICE_ID_INTEL_CNL_GT2_ULT_4		0x5A4A
 #define PCI_DEVICE_ID_INTEL_CFL_GT2_ULT			0x3EA5
 #define PCI_DEVICE_ID_INTEL_CFL_H_GT2			0x3e9b
-#define PCI_DEVICE_ID_INTEL_CFL_S_GT2			0x3e92
 #define PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2		0x3e94
-#define PCI_DEVICE_ID_INTEL_ICL_GT0_ULT		0x8A70
+#define PCI_DEVICE_ID_INTEL_CFL_S_GT2_1			0x3e92
+#define PCI_DEVICE_ID_INTEL_CFL_S_GT2_2			0x3e98
+#define PCI_DEVICE_ID_INTEL_CFL_S_GT2_3			0x3e9a
+#define PCI_DEVICE_ID_INTEL_ICL_GT0_ULT			0x8A70
 #define PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT		0x8A71
-#define PCI_DEVICE_ID_INTEL_ICL_GT1_ULT		0x8A40
+#define PCI_DEVICE_ID_INTEL_ICL_GT1_ULT			0x8A40
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_0		0x8A50
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_1		0x8A5D
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_1		0x8A5B
@@ -3059,7 +3066,7 @@
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_5		0x8A55
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULT_5		0x8A56
 #define PCI_DEVICE_ID_INTEL_ICL_GT2_ULX_6		0x8A57
-#define PCI_DEVICE_ID_INTEL_ICL_GT3_ULT		0x8A62
+#define PCI_DEVICE_ID_INTEL_ICL_GT3_ULT			0x8A62
 #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1		0x9B21
 #define PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2		0x9B2A
 #define PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1		0x9B41
@@ -3080,43 +3087,46 @@
 #define PCI_DEVICE_ID_INTEL_CML_GT2_H_2			0x9B42
 
 /* Intel Northbridge Ids */
-#define PCI_DEVICE_ID_INTEL_APL_NB	0x5af0
-#define PCI_DEVICE_ID_INTEL_GLK_NB	0x31f0
-#define PCI_DEVICE_ID_INTEL_SKL_ID_U	0x1904
-#define PCI_DEVICE_ID_INTEL_SKL_ID_Y	0x190c
-#define PCI_DEVICE_ID_INTEL_SKL_ID_ULX	0x1924
-#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2  0x1900
-#define PCI_DEVICE_ID_INTEL_SKL_ID_H	0x1910
-#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2  0x190f
-#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4  0x191f
-#define PCI_DEVICE_ID_INTEL_KBL_ID_S	0x590f
-#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM	0x1918
-#define PCI_DEVICE_ID_INTEL_SKL_ID_DT	0x191f
-#define PCI_DEVICE_ID_INTEL_KBL_ID_U	0x5904
-#define PCI_DEVICE_ID_INTEL_KBL_ID_Y	0x590c
-#define PCI_DEVICE_ID_INTEL_KBL_ID_H	0x5910
-#define PCI_DEVICE_ID_INTEL_KBL_U_R	0x5914
-#define PCI_DEVICE_ID_INTEL_KBL_ID_DT_2 0x5918
-#define PCI_DEVICE_ID_INTEL_KBL_ID_DT	0x591f
-#define PCI_DEVICE_ID_INTEL_CNL_ID_U	0x5A04
-#define PCI_DEVICE_ID_INTEL_CNL_ID_Y	0x5A02
-#define PCI_DEVICE_ID_INTEL_WHL_ID_Wx4	0x3E34
-#define PCI_DEVICE_ID_INTEL_WHL_ID_Wx2	0x3E35
-#define PCI_DEVICE_ID_INTEL_CFL_ID_U	0x3ED0
-#define PCI_DEVICE_ID_INTEL_CFL_ID_H	0x3ec4
-#define PCI_DEVICE_ID_INTEL_CFL_ID_S	0x3ec2
-#define PCI_DEVICE_ID_INTEL_ICL_ID_U	0x8A12
+#define PCI_DEVICE_ID_INTEL_APL_NB		0x5af0
+#define PCI_DEVICE_ID_INTEL_GLK_NB		0x31f0
+#define PCI_DEVICE_ID_INTEL_SKL_ID_U		0x1904
+#define PCI_DEVICE_ID_INTEL_SKL_ID_Y		0x190c
+#define PCI_DEVICE_ID_INTEL_SKL_ID_ULX		0x1924
+#define PCI_DEVICE_ID_INTEL_SKL_ID_H_2		0x1900
+#define PCI_DEVICE_ID_INTEL_SKL_ID_H		0x1910
+#define PCI_DEVICE_ID_INTEL_SKL_ID_S_2		0x190f
+#define PCI_DEVICE_ID_INTEL_SKL_ID_S_4		0x191f
+#define PCI_DEVICE_ID_INTEL_KBL_ID_S		0x590f
+#define PCI_DEVICE_ID_INTEL_SKL_ID_H_EM		0x1918
+#define PCI_DEVICE_ID_INTEL_SKL_ID_DT		0x191f
+#define PCI_DEVICE_ID_INTEL_KBL_ID_U		0x5904
+#define PCI_DEVICE_ID_INTEL_KBL_ID_Y		0x590c
+#define PCI_DEVICE_ID_INTEL_KBL_ID_H		0x5910
+#define PCI_DEVICE_ID_INTEL_KBL_U_R		0x5914
+#define PCI_DEVICE_ID_INTEL_KBL_ID_DT_2		0x5918
+#define PCI_DEVICE_ID_INTEL_KBL_ID_DT		0x591f
+#define PCI_DEVICE_ID_INTEL_CNL_ID_U		0x5A04
+#define PCI_DEVICE_ID_INTEL_CNL_ID_Y		0x5A02
+#define PCI_DEVICE_ID_INTEL_WHL_ID_W_4		0x3E34
+#define PCI_DEVICE_ID_INTEL_WHL_ID_W_2		0x3E35
+#define PCI_DEVICE_ID_INTEL_CFL_ID_U		0x3ED0
+#define PCI_DEVICE_ID_INTEL_CFL_ID_H		0x3ec4
+#define PCI_DEVICE_ID_INTEL_CFL_ID_H_8		0x3e20
+#define PCI_DEVICE_ID_INTEL_CFL_ID_S		0x3ec2
+#define PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8	0x3e30
+#define PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8	0x3e31
+#define PCI_DEVICE_ID_INTEL_ICL_ID_U		0x8A12
 #define PCI_DEVICE_ID_INTEL_ICL_ID_U_2_2	0x8A02
-#define PCI_DEVICE_ID_INTEL_ICL_ID_Y	0x8A10
-#define PCI_DEVICE_ID_INTEL_ICL_ID_Y_2	0x8A00
-#define PCI_DEVICE_ID_INTEL_CML_ULT	0x9B61
-#define PCI_DEVICE_ID_INTEL_CML_ULT_2_2	0x9B71
-#define PCI_DEVICE_ID_INTEL_CML_ULT_6_2	0x9B51
-#define PCI_DEVICE_ID_INTEL_CML_ULX	0x9B60
-#define PCI_DEVICE_ID_INTEL_CML_S	0x9B55
-#define PCI_DEVICE_ID_INTEL_CML_S_10_2	0x9B35
-#define PCI_DEVICE_ID_INTEL_CML_H	0x9B54
-#define PCI_DEVICE_ID_INTEL_CML_H_8_2	0x9B44
+#define PCI_DEVICE_ID_INTEL_ICL_ID_Y		0x8A10
+#define PCI_DEVICE_ID_INTEL_ICL_ID_Y_2		0x8A00
+#define PCI_DEVICE_ID_INTEL_CML_ULT		0x9B61
+#define PCI_DEVICE_ID_INTEL_CML_ULT_2_2		0x9B71
+#define PCI_DEVICE_ID_INTEL_CML_ULT_6_2		0x9B51
+#define PCI_DEVICE_ID_INTEL_CML_ULX		0x9B60
+#define PCI_DEVICE_ID_INTEL_CML_S		0x9B55
+#define PCI_DEVICE_ID_INTEL_CML_S_10_2		0x9B35
+#define PCI_DEVICE_ID_INTEL_CML_H		0x9B54
+#define PCI_DEVICE_ID_INTEL_CML_H_8_2		0x9B44
 
 /* Intel SMBUS device Ids */
 #define PCI_DEVICE_ID_INTEL_SPT_LP_SMBUS		0x9d23
diff --git a/src/soc/intel/cannonlake/bootblock/report_platform.c b/src/soc/intel/cannonlake/bootblock/report_platform.c
index 1cbbd6384d..4bb06fb347 100644
--- a/src/soc/intel/cannonlake/bootblock/report_platform.c
+++ b/src/soc/intel/cannonlake/bootblock/report_platform.c
@@ -40,6 +40,8 @@ static struct {
 	{ CPUID_WHISKEYLAKE_V0, "Whiskeylake V0" },
 	{ CPUID_WHISKEYLAKE_W0, "Whiskeylake W0" },
 	{ CPUID_COFFEELAKE_U0, "Coffeelake U0 (6+2)" },
+	{ CPUID_COFFEELAKE_P0, "Coffeelake P0" },
+	{ CPUID_COFFEELAKE_R0, "Coffeelake R0" },
 	{ CPUID_COMETLAKE_U_A0, "Cometlake-U A0 (6+2)" },
 	{ CPUID_COMETLAKE_U_K0_S0, "Cometlake-U K0/S0 (6+2)/(4+2)" },
 	{ CPUID_COMETLAKE_H_S_6_2_P0, "Cometlake-H/S P0 (6+2)" },
@@ -53,10 +55,13 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_CNL_ID_U, "Cannonlake-U" },
 	{ PCI_DEVICE_ID_INTEL_CNL_ID_Y, "Cannonlake-Y" },
 	{ PCI_DEVICE_ID_INTEL_CFL_ID_U, "Coffeelake U (4+3e)" },
-	{ PCI_DEVICE_ID_INTEL_WHL_ID_Wx4, "Whiskeylake W (4+2)" },
-	{ PCI_DEVICE_ID_INTEL_WHL_ID_Wx2, "Whiskeylake W (2+2)" },
+	{ PCI_DEVICE_ID_INTEL_WHL_ID_W_4, "Whiskeylake W (4+2)" },
+	{ PCI_DEVICE_ID_INTEL_WHL_ID_W_2, "Whiskeylake W (2+2)" },
 	{ PCI_DEVICE_ID_INTEL_CFL_ID_H, "Coffeelake-H" },
+	{ PCI_DEVICE_ID_INTEL_CFL_ID_H_8, "Coffeelake-H (8+2)" },
 	{ PCI_DEVICE_ID_INTEL_CFL_ID_S, "Coffeelake-S" },
+	{ PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8, "Coffeelake-S DT(8+2)" },
+	{ PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8, "Coffeelake-S WS(8+2)" },
 	{ PCI_DEVICE_ID_INTEL_CML_ULT, "CometLake-U (4+2)" },
 	{ PCI_DEVICE_ID_INTEL_CML_ULT_2_2, "CometLake-U (2+2)" },
 	{ PCI_DEVICE_ID_INTEL_CML_ULT_6_2, "CometLake-U (6+2)" },
@@ -76,6 +81,7 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC, "Cannonlake-Y Premium" },
 	{ PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370, "Cannonlake-H Q370" },
 	{ PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370, "Cannonlake-H QM370" },
+	{ PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246, "Cannonlake-H C246" },
 	{ PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246, "Cannonlake-H CM246" },
 	{ PCI_DEVICE_ID_INTEL_CMP_SUPER_U_LPC, "Cometlake-U Super" },
 	{ PCI_DEVICE_ID_INTEL_CMP_PREMIUM_Y_LPC, "Cometlake-Y Premium" },
@@ -101,7 +107,9 @@ static struct {
 	{ PCI_DEVICE_ID_INTEL_WHL_GT2_ULT_1, "Whiskeylake ULT GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_H_GT2, "Coffeelake-H GT2" },
 	{ PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2, "Coffeelake-H Xeon GT2" },
-	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2, "Coffeelake-S GT2" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_1, "Coffeelake-S GT2" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_2, "Coffeelake-S GT2" },
+	{ PCI_DEVICE_ID_INTEL_CFL_S_GT2_3, "Coffeelake-S GT2" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_1, "CometLake ULT GT1" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT1_ULT_2, "CometLake ULT GT1" },
 	{ PCI_DEVICE_ID_INTEL_CML_GT2_ULT_1, "CometLake ULT GT2" },
diff --git a/src/soc/intel/common/block/cpu/mp_init.c b/src/soc/intel/common/block/cpu/mp_init.c
index e98b5dd615..12417097c5 100644
--- a/src/soc/intel/common/block/cpu/mp_init.c
+++ b/src/soc/intel/common/block/cpu/mp_init.c
@@ -75,6 +75,8 @@ static const struct cpu_device_id cpu_table[] = {
 	{ X86_VENDOR_INTEL, CPUID_WHISKEYLAKE_W0 },
 	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_U0 },
 	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_D0 },
+	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_P0 },
+	{ X86_VENDOR_INTEL, CPUID_COFFEELAKE_R0 },
 	{ X86_VENDOR_INTEL, CPUID_ICELAKE_A0 },
 	{ X86_VENDOR_INTEL, CPUID_ICELAKE_B0 },
 	{ X86_VENDOR_INTEL, CPUID_COMETLAKE_U_A0 },
diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c
index e4ccccb013..7885ad7cce 100644
--- a/src/soc/intel/common/block/graphics/graphics.c
+++ b/src/soc/intel/common/block/graphics/graphics.c
@@ -150,8 +150,10 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_SKL_GT2_SWKSM,
 	PCI_DEVICE_ID_INTEL_SKL_GT4_SHALM,
 	PCI_DEVICE_ID_INTEL_CFL_H_GT2,
-	PCI_DEVICE_ID_INTEL_CFL_S_GT2,
 	PCI_DEVICE_ID_INTEL_CFL_H_XEON_GT2,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT2_1,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT2_2,
+	PCI_DEVICE_ID_INTEL_CFL_S_GT2_3,
 	PCI_DEVICE_ID_INTEL_ICL_GT0_ULT,
 	PCI_DEVICE_ID_INTEL_ICL_GT0_5_ULT,
 	PCI_DEVICE_ID_INTEL_ICL_GT1_ULT,
diff --git a/src/soc/intel/common/block/include/intelblocks/mp_init.h b/src/soc/intel/common/block/include/intelblocks/mp_init.h
index 0f37a64345..11f1aa652a 100644
--- a/src/soc/intel/common/block/include/intelblocks/mp_init.h
+++ b/src/soc/intel/common/block/include/intelblocks/mp_init.h
@@ -42,7 +42,8 @@
 #define CPUID_WHISKEYLAKE_W0	0x806eb
 #define CPUID_COFFEELAKE_D0	0x806ea
 #define CPUID_COFFEELAKE_U0	0x906ea
-
+#define CPUID_COFFEELAKE_P0	0x906ec
+#define CPUID_COFFEELAKE_R0	0x906ed
 #define CPUID_ICELAKE_A0	0x706e0
 #define CPUID_ICELAKE_B0	0x706e1
 #define CPUID_COMETLAKE_U_A0		0xa0660
diff --git a/src/soc/intel/common/block/lpc/lpc.c b/src/soc/intel/common/block/lpc/lpc.c
index 43ac8444a9..1a4d295bb2 100644
--- a/src/soc/intel/common/block/lpc/lpc.c
+++ b/src/soc/intel/common/block/lpc/lpc.c
@@ -156,6 +156,7 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CNL_Y_PREMIUM_LPC,
 	PCI_DEVICE_ID_INTEL_CNP_H_LPC_Q370,
 	PCI_DEVICE_ID_INTEL_CNP_H_LPC_QM370,
+	PCI_DEVICE_ID_INTEL_CNP_H_LPC_C246,
 	PCI_DEVICE_ID_INTEL_CNP_H_LPC_CM246,
 	PCI_DEVICE_ID_INTEL_ICL_BASE_U_ESPI,
 	PCI_DEVICE_ID_INTEL_ICL_BASE_Y_ESPI,
diff --git a/src/soc/intel/common/block/spi/spi.c b/src/soc/intel/common/block/spi/spi.c
index 85db5cfa4a..af5087f716 100644
--- a/src/soc/intel/common/block/spi/spi.c
+++ b/src/soc/intel/common/block/spi/spi.c
@@ -67,6 +67,10 @@ static const unsigned short pci_device_ids[] = {
 	PCI_DEVICE_ID_INTEL_CNL_SPI1,
 	PCI_DEVICE_ID_INTEL_CNL_SPI2,
 	PCI_DEVICE_ID_INTEL_CNL_HWSEQ_SPI,
+	PCI_DEVICE_ID_INTEL_CNP_H_SPI0,
+	PCI_DEVICE_ID_INTEL_CNP_H_SPI1,
+	PCI_DEVICE_ID_INTEL_CNP_H_SPI2,
+	PCI_DEVICE_ID_INTEL_CNP_H_HWSEQ_SPI,
 	PCI_DEVICE_ID_INTEL_ICP_SPI0,
 	PCI_DEVICE_ID_INTEL_ICP_SPI1,
 	PCI_DEVICE_ID_INTEL_ICP_SPI2,
diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c
index a93db65af6..420f8b89d7 100644
--- a/src/soc/intel/common/block/systemagent/systemagent.c
+++ b/src/soc/intel/common/block/systemagent/systemagent.c
@@ -344,8 +344,8 @@ static const unsigned short systemagent_ids[] = {
 	PCI_DEVICE_ID_INTEL_SKL_ID_H_2,
 	PCI_DEVICE_ID_INTEL_SKL_ID_S_2,
 	PCI_DEVICE_ID_INTEL_SKL_ID_S_4,
-	PCI_DEVICE_ID_INTEL_WHL_ID_Wx2,
-	PCI_DEVICE_ID_INTEL_WHL_ID_Wx4,
+	PCI_DEVICE_ID_INTEL_WHL_ID_W_2,
+	PCI_DEVICE_ID_INTEL_WHL_ID_W_4,
 	PCI_DEVICE_ID_INTEL_KBL_ID_S,
 	PCI_DEVICE_ID_INTEL_SKL_ID_H_EM,
 	PCI_DEVICE_ID_INTEL_SKL_ID_DT,
@@ -357,7 +357,10 @@ static const unsigned short systemagent_ids[] = {
 	PCI_DEVICE_ID_INTEL_KBL_ID_DT_2,
 	PCI_DEVICE_ID_INTEL_CFL_ID_U,
 	PCI_DEVICE_ID_INTEL_CFL_ID_H,
+	PCI_DEVICE_ID_INTEL_CFL_ID_H_8,
 	PCI_DEVICE_ID_INTEL_CFL_ID_S,
+	PCI_DEVICE_ID_INTEL_CFL_ID_S_DT_8,
+	PCI_DEVICE_ID_INTEL_CFL_ID_S_WS_8,
 	PCI_DEVICE_ID_INTEL_ICL_ID_U,
 	PCI_DEVICE_ID_INTEL_ICL_ID_U_2_2,
 	PCI_DEVICE_ID_INTEL_ICL_ID_Y,