diff options
| author | huang lin <hl@rock-chips.com> | 2015-02-27 19:35:04 -0800 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-21 08:19:21 +0200 |
| commit | 3704e69e472d68e52c9e8a64b648fbf80f6e0e63 (patch) | |
| tree | c5e39bd0b6e40b16547ac37c5f722f528aa6aebc | |
| parent | 19ee1569f6d411d26111afc0552e6a11178e1890 (diff) | |
rk3288: disable rk808 DCDC_UV_ACT_REG restart converter function
if DCDC_UV_ACT_REG setted, when the buck voltage drop to 85%,
rk808 will reset this buck, but now when the current consumption large,
rk808 may miscarriage of justice this status, so we must disable this function
BUG=chrome-os-partner:34834
TEST=Boot from jerry, and do RUNIN test sucess
BRANCH=None
Change-Id: I08cef73b88d6c2722b389c632c7db29605f4545d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Original-Commit-Id: 858c8abc11a824fc3d991a39a49710243f4b1473
Original-Change-Id: I46ebe332c576eebd3386b5042b146a8b57a5c194
Original-Signed-off-by: huang lin <hl@rock-chips.com>
Original-Reviewed-on: https://chromium-review.googlesource.com/254496
Original-Commit-Queue: Julius Werner <jwerner@chromium.org>
Original-Tested-by: Julius Werner <jwerner@chromium.org>
Original-Reviewed-by: Julius Werner <jwerner@chromium.org>
Reviewed-on: http://review.coreboot.org/9831
Tested-by: build bot (Jenkins)
Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
| -rw-r--r-- | src/soc/rockchip/rk3288/rk808.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/rockchip/rk3288/rk808.c b/src/soc/rockchip/rk3288/rk808.c index d375f46483..b922d81c77 100644 --- a/src/soc/rockchip/rk3288/rk808.c +++ b/src/soc/rockchip/rk3288/rk808.c @@ -54,6 +54,7 @@ #define RTC_CTRL_GET_TIME (1 << 6) #define RTC_CTRL_RTC_READSEL (1 << 7) +#define DCDC_UV_ACT 0x28 #define DCDC_ILMAX 0x90 static int rk808_read(uint8_t reg, uint8_t *value) @@ -134,6 +135,10 @@ void rk808_configure_buck(int buck, int millivolts) die("Unknown buck index!"); } rk808_clrsetbits(DCDC_ILMAX, 0, 3 << ((buck - 1) * 2)); + + /* undervoltage detection may be wrong, disable it */ + rk808_clrsetbits(DCDC_UV_ACT, 1 << (buck - 1), 0); + rk808_clrsetbits(buck_reg, 0x3f, vsel); rk808_clrsetbits(DCDC_EN, 0, 1 << (buck - 1)); } |