diff options
| author | Rex-BC Chen <rex-bc.chen@mediatek.corp-partner.google.com> | 2021-12-02 19:17:06 +0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-01-07 15:29:31 +0000 |
| commit | 362a4819b3f00f581d272f010d3a42c49a6b9d93 (patch) | |
| tree | d0a0a5f5339d0eb71bbf3bb19255656f829c7081 | |
| parent | 1e9dfd9d8c8c432b885ed10f25b2101f9aa2d2b1 (diff) | |
soc/mediatek/mt8186: initialize DFD
DFD (Design for Debug) is a debugging tool, which scans flip-flops
and dumps to internal RAM on the WDT reset. After system reboots,
those values can be shown for debugging using MTK internal parsing
tools.
BUG=b:202871018
TEST=build pass
Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Change-Id: I7b711755022b5d9767019611151fea65e71edc66
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60828
Reviewed-by: Hung-Te Lin <hungte@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/soc/mediatek/mt8186/Makefile.inc | 1 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/include/soc/dfd.h | 12 | ||||
| -rw-r--r-- | src/soc/mediatek/mt8186/soc.c | 11 |
3 files changed, 24 insertions, 0 deletions
diff --git a/src/soc/mediatek/mt8186/Makefile.inc b/src/soc/mediatek/mt8186/Makefile.inc index f99bd47d47..0d56f15009 100644 --- a/src/soc/mediatek/mt8186/Makefile.inc +++ b/src/soc/mediatek/mt8186/Makefile.inc @@ -46,6 +46,7 @@ romstage-y += ../common/rtc.c ../common/rtc_osc_init.c rtc.c ramstage-y += ../common/auxadc.c ramstage-y += ../common/ddp.c ddp.c ramstage-y += devapc.c +ramstage-y += ../common/dfd.c ramstage-y += ../common/dsi.c ../common/mtk_mipi_dphy.c ramstage-y += emi.c ramstage-y += ../common/flash_controller.c diff --git a/src/soc/mediatek/mt8186/include/soc/dfd.h b/src/soc/mediatek/mt8186/include/soc/dfd.h new file mode 100644 index 0000000000..b2f1388693 --- /dev/null +++ b/src/soc/mediatek/mt8186/include/soc/dfd.h @@ -0,0 +1,12 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef SOC_MEDIATEK_MT8186_DFD_H +#define SOC_MEDIATEK_MT8186_DFD_H + +#include <soc/dfd_common.h> + +/* DFD dump address and size need to be the same as defined in Kernel DTS. */ +#define DFD_DUMP_ADDRESS 0x6A000000 +#define DFD_DUMP_SIZE (1 * MiB) + +#endif diff --git a/src/soc/mediatek/mt8186/soc.c b/src/soc/mediatek/mt8186/soc.c index 3ad83f7a65..7686986e71 100644 --- a/src/soc/mediatek/mt8186/soc.c +++ b/src/soc/mediatek/mt8186/soc.c @@ -1,12 +1,20 @@ /* SPDX-License-Identifier: GPL-2.0-only */ +#include <bootmem.h> #include <device/device.h> #include <soc/devapc.h> +#include <soc/dfd.h> #include <soc/emi.h> #include <soc/mmu_operations.h> #include <soc/sspm.h> #include <symbols.h> +void bootmem_platform_add_ranges(void) +{ + if (CONFIG(MTK_DFD)) + bootmem_add_range(DFD_DUMP_ADDRESS, DFD_DUMP_SIZE, BM_MEM_RESERVED); +} + static void soc_read_resources(struct device *dev) { ram_resource(dev, 0, (uintptr_t)_dram / KiB, sdram_size() / KiB); @@ -17,6 +25,9 @@ static void soc_init(struct device *dev) mtk_mmu_disable_l2c_sram(); sspm_init(); dapc_init(); + + if (CONFIG(MTK_DFD)) + dfd_init(); } static struct device_operations soc_ops = { |