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authorLee Leahy <leroy.p.leahy@intel.com>2015-07-20 17:24:44 -0700
committerAaron Durbin <adurbin@chromium.org>2015-08-13 16:10:44 +0200
commit3432e556f548c0e61c714b880ce04bf1f3f687bd (patch)
tree8e9bc1cd67019a8fcb90b3e2e014f6003d259c51
parentaa44dbd364bfb36b3cb4eb2fb3f9ee292610ccf4 (diff)
soc/common/intel: Reset is not dependend upon FSP
Remove dependency of common reset code on FSP BRANCH=none BUG=None TEST=Build and run on Braswell and Skylake Original-Change-Id: I00052f29326f691b6d56d2349f99815cafff5848 Original-Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/286932 Original-Commit-Queue: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Tested-by: Leroy P Leahy <leroy.p.leahy@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Change-Id: I7f59f0aad7dfae92df28cf20fff2d5a684795d22 Signed-off-by: Lee Leahy <Leroy.P.Leahy@intel.com> Reviewed-on: http://review.coreboot.org/11165 Tested-by: build bot (Jenkins) Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
-rw-r--r--src/soc/intel/common/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/intel/common/Kconfig b/src/soc/intel/common/Kconfig
index 68d3f5ea6c..dfbc6bb729 100644
--- a/src/soc/intel/common/Kconfig
+++ b/src/soc/intel/common/Kconfig
@@ -66,7 +66,6 @@ config SOC_INTEL_COMMON_FSP_ROMSTAGE
config SOC_INTEL_COMMON_RESET
bool
default n
- depends on PLATFORM_USES_FSP1_1
config SOC_INTEL_COMMON_STACK
bool