diff options
author | Mathew King <mathewk@chromium.org> | 2021-03-16 11:11:25 -0600 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2021-03-18 17:19:06 +0000 |
commit | 33f3c53504cd1ad95c85c7f8451159e61ec845a6 (patch) | |
tree | 9404166c74e69db24bc85b41655847c1384fda0a | |
parent | d4863a5ca0bd3e9804366257e032ece5cc83114f (diff) |
soc/amd/common: Make fch_spi_config_modes static
It is currently only used in this translation unit.
Signed-off-by: Mathew King <mathewk@chromium.org>
Change-Id: Ib779a38306fb45320f3e4eb71f63630023d59906
Reviewed-on: https://review.coreboot.org/c/coreboot/+/51535
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/soc/amd/common/block/include/amdblocks/spi.h | 8 | ||||
-rw-r--r-- | src/soc/amd/common/block/spi/fch_spi.c | 2 |
2 files changed, 1 insertions, 9 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/spi.h b/src/soc/amd/common/block/include/amdblocks/spi.h index 7da1b24325..a551151d46 100644 --- a/src/soc/amd/common/block/include/amdblocks/spi.h +++ b/src/soc/amd/common/block/include/amdblocks/spi.h @@ -88,14 +88,6 @@ struct spi_config { */ void fch_spi_early_init(void); -/* - * Configure SPI speed and read mode. - * - * This function expects SoC to include soc_amd_common_config in chip SoC config and uses - * settings from mainboard devicetree to configure speed and read mode. - */ -void fch_spi_config_modes(void); - /* Set the SPI base address variable */ void spi_set_base(void *base); diff --git a/src/soc/amd/common/block/spi/fch_spi.c b/src/soc/amd/common/block/spi/fch_spi.c index a644d273a1..0351847756 100644 --- a/src/soc/amd/common/block/spi/fch_spi.c +++ b/src/soc/amd/common/block/spi/fch_spi.c @@ -49,7 +49,7 @@ static void fch_spi_config_em100_modes(void) fch_spi_set_spi100(SPI_SPEED_16M, SPI_SPEED_16M, SPI_SPEED_16M, SPI_SPEED_16M); } -void fch_spi_config_modes(void) +static void fch_spi_config_modes(void) { if (CONFIG(EM100)) fch_spi_config_em100_modes(); |