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authorSumeet Pawnikar <sumeet.r.pawnikar@intel.com>2023-07-04 14:34:36 +0530
committerSubrata Banik <subratabanik@google.com>2023-07-05 10:35:57 +0000
commit33c6171bdec463112ad24f3c3ac40c1b6fbd5ece (patch)
treea06be1515c583fe676af59781f5eed5e1537bdbe
parent3d4ff8498c0b607770194eaf716ebd55493d8333 (diff)
soc/intel/meteoerlake: add support for 28W SKU
Add power limits support for 28W SKU. BRANCH=None BUG=b:289854108 TEST=Build FW Change-Id: I83deb1e574990cb70f9aac5d5eb46fbb710a6170 Signed-off-by: Sumeet Pawnikar <sumeet.r.pawnikar@intel.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/76238 Reviewed-by: Subrata Banik <subratabanik@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/soc/intel/meteorlake/chip.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/intel/meteorlake/chip.h b/src/soc/intel/meteorlake/chip.h
index 37a76154bc..9ea77737e2 100644
--- a/src/soc/intel/meteorlake/chip.h
+++ b/src/soc/intel/meteorlake/chip.h
@@ -24,12 +24,14 @@
/* Types of different SKUs */
enum soc_intel_meteorlake_power_limits {
MTL_P_282_CORE,
+ MTL_P_682_CORE,
MTL_POWER_LIMITS_COUNT
};
/* TDP values for different SKUs */
enum soc_intel_meteorlake_cpu_tdps {
- TDP_15W = 15
+ TDP_15W = 15,
+ TDP_28W = 28
};
/* Mapping of different SKUs based on CPU ID and TDP values */
@@ -39,6 +41,7 @@ static const struct {
enum soc_intel_meteorlake_cpu_tdps cpu_tdp;
} cpuid_to_mtl[] = {
{ PCI_DID_INTEL_MTL_P_ID_2, MTL_P_282_CORE, TDP_15W },
+ { PCI_DID_INTEL_MTL_P_ID_1, MTL_P_682_CORE, TDP_28W },
};
/* Types of display ports */