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authorAngel Pons <th3fanbus@gmail.com>2020-06-21 15:12:58 +0200
committerPatrick Georgi <pgeorgi@google.com>2020-06-25 12:52:09 +0000
commit3105136660c67f3fe416dcd375fc329d72d65653 (patch)
tree3892e0f81eb41fb5a47ad1e19084939d79d21dea
parente233a916d01198cf61c67ba8fe14f3f7fad5a862 (diff)
sb/intel/i82801jx/Kconfig: Sort options alphabetically
Tested with BUILD_TIMELESS=1, Intel DG43GT remains identical. Change-Id: Ie5b87726cccf9fb8e45db39a6d6fba8ac4342f5f Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/42646 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/southbridge/intel/i82801jx/Kconfig35
1 files changed, 18 insertions, 17 deletions
diff --git a/src/southbridge/intel/i82801jx/Kconfig b/src/southbridge/intel/i82801jx/Kconfig
index b272296318..c79b3682e8 100644
--- a/src/southbridge/intel/i82801jx/Kconfig
+++ b/src/southbridge/intel/i82801jx/Kconfig
@@ -2,25 +2,25 @@
config SOUTHBRIDGE_INTEL_I82801JX
bool
- select SOUTHBRIDGE_INTEL_COMMON_SMBUS
- select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
- select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
- select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
- select SOUTHBRIDGE_INTEL_COMMON_PMBASE
- select SOUTHBRIDGE_INTEL_COMMON_RTC
- select SOUTHBRIDGE_INTEL_COMMON_RESET
- select IOAPIC
- select USE_WATCHDOG_ON_BOOT
+ select ACPI_INTEL_HARDWARE_SLEEP_VALUES
+ select HAVE_POWER_STATE_AFTER_FAILURE
+ select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
select HAVE_SMI_HANDLER
select HAVE_USBDEBUG_OPTIONS
- select SOUTHBRIDGE_INTEL_COMMON_GPIO
select INTEL_DESCRIPTOR_MODE_CAPABLE
+ select IOAPIC
+ select SOUTHBRIDGE_INTEL_COMMON_GPIO
+ select SOUTHBRIDGE_INTEL_COMMON_PMBASE
+ select SOUTHBRIDGE_INTEL_COMMON_PMCLIB
+ select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ
+ select SOUTHBRIDGE_INTEL_COMMON_RESET
+ select SOUTHBRIDGE_INTEL_COMMON_RTC
+ select SOUTHBRIDGE_INTEL_COMMON_SMBUS
select SOUTHBRIDGE_INTEL_COMMON_SMM
- select ACPI_INTEL_HARDWARE_SLEEP_VALUES
- select HAVE_POWER_STATE_AFTER_FAILURE
- select HAVE_POWER_STATE_PREVIOUS_AFTER_FAILURE
- select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
+ select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9
select SOUTHBRIDGE_INTEL_COMMON_USB_DEBUG
+ select SOUTHBRIDGE_INTEL_COMMON_WATCHDOG
+ select USE_WATCHDOG_ON_BOOT
if SOUTHBRIDGE_INTEL_I82801JX
@@ -28,12 +28,13 @@ config EHCI_BAR
hex
default 0xfef00000
+config HPET_MIN_TICKS
+ hex
+ default 0x80
+
## Some enterprise variants may require an IFD
config INTEL_DESCRIPTOR_MODE_REQUIRED
bool
default n
-config HPET_MIN_TICKS
- hex
- default 0x80
endif