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authorTony Huang <tony-huang@quanta.corp-partner.google.com>2022-08-31 10:40:36 +0800
committerMartin L Roth <gaumless@gmail.com>2022-09-04 16:43:13 +0000
commit30b50adef001e548874482d0b7f8fc94a4315823 (patch)
tree01f65221c7c3806c71444cc884cd08756d65f1ba
parent117e436115484f0ce184114b22b716616592e77e (diff)
mb/google/dedede/var/shotzo: Update DPTF parameters
Update DPTF parameters from internal thermal team. BUG=b:244373677 BRANCH=firmware-dedede-13606.B TEST=Build image and verified by thermal team. Change-Id: I8415e0d25a79764f0c1d11688728b7caa3b3d6a4 Signed-off-by: Tony Huang <tony-huang@quanta.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67214 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
-rw-r--r--src/mainboard/google/dedede/variants/shotzo/overridetree.cb52
1 files changed, 52 insertions, 0 deletions
diff --git a/src/mainboard/google/dedede/variants/shotzo/overridetree.cb b/src/mainboard/google/dedede/variants/shotzo/overridetree.cb
index d84e859c58..91848e58b0 100644
--- a/src/mainboard/google/dedede/variants/shotzo/overridetree.cb
+++ b/src/mainboard/google/dedede/variants/shotzo/overridetree.cb
@@ -30,11 +30,63 @@ chip soc/intel/jasperlake
register "disable_external_bypass_vr" = "1" # Does not support external vnn power rail
+ register "power_limits_config" = "{
+ .tdp_pl1_override = 7,
+ .tdp_pl2_override = 25,
+ }"
+
+ register "tcc_offset" = "5" # TCC of 100C
+
# USB Port Configuration
register "usb2_ports[5]" = "USB2_PORT_MID(OC_SKIP)" # Camera
register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" # Lan
device domain 0 on
+ device pci 04.0 on
+ chip drivers/intel/dptf
+ # Default DPTF Policy for all drawcia boards if not overridden
+ register "options.tsr[0].desc" = ""Ambient""
+
+ ## Passive Policy
+ register "policies.passive" = "{
+ [0] = DPTF_PASSIVE(CPU, CPU, 85, 60000),
+ [1] = DPTF_PASSIVE(CPU, TEMP_SENSOR_0, 65, 60000),
+ }"
+
+ ## Critical Policy
+ register "policies.critical" = "{
+ [0] = DPTF_CRITICAL(CPU, 105, SHUTDOWN),
+ [1] = DPTF_CRITICAL(TEMP_SENSOR_0, 78, SHUTDOWN),
+ }"
+
+ register "controls.power_limits" = "{
+ .pl1 = {
+ .min_power = 6000,
+ .max_power = 6500,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 100,
+ },
+ .pl2 = {
+ .min_power = 25000,
+ .max_power = 25000,
+ .time_window_min = 1 * MSECS_PER_SEC,
+ .time_window_max = 1 * MSECS_PER_SEC,
+ .granularity = 1000,
+ }
+ }"
+
+ ## Charger Performance Control (Control, mA)
+ register "controls.charger_perf" = "{
+ [0] = { 255, 3000 },
+ [1] = { 24, 1500 },
+ [2] = { 16, 1000 },
+ [3] = { 8, 500 }
+ }"
+
+ device generic 0 on end
+ end
+ end # SA Thermal device
device pci 14.0 on
chip drivers/usb/acpi
device usb 0.0 on