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authorJonathan Neuschäfer <j.neuschaefer@gmx.net>2018-09-25 23:15:16 +0200
committerPatrick Georgi <pgeorgi@google.com>2018-10-04 09:38:50 +0000
commit2d1d47bf3eb0f2d3db0b3dbe957a5355e2ac94f1 (patch)
treeec3ba2a3acc5672bdfd4fc90ade43bd37f250921
parent6dff3fdd403b57cd9ebaa9518a2e51e42e18e6ff (diff)
MAINTAINERS: Update RISC-V entry with SiFive and utils
Change-Id: Idd9e51fe2cb7a8497381f5b7440666cd709166b8 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28757 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Hug <philipp@hug.cx> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
-rw-r--r--MAINTAINERS3
1 files changed, 3 insertions, 0 deletions
diff --git a/MAINTAINERS b/MAINTAINERS
index 4d27129c0a..b7031c54e5 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -124,8 +124,11 @@ M: Ronald Minnich <rminnich@gmail.com>
M: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
S: Maintained
F: src/arch/riscv/
+F: src/soc/sifive/
F: src/soc/ucb/
F: src/mainboard/emulation/*-riscv/
+F: src/mainboard/sifive/
+F: util/riscv/
POWER8 ARCHITECTURE
M: Ronald Minnich <rminnich@gmail.com>