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authorKerry Sheh <shekairui@gmail.com>2011-10-11 17:27:00 +0800
committerMarc Jones <marcj303@gmail.com>2011-10-12 03:40:18 +0200
commit2c7c37a01615a8435d13bd0a027ecc9b5985d7a8 (patch)
tree332346efafceed75a7b5bec77294320869653001
parent5f145faff88ac6a0951277142e8b4f8116ae79de (diff)
persimmon: complete the sb800 devicetree
sb800 cimx entry sb_Before_Pci_Init was called in the device 16.2 enable_dev() function. If the devicetree don't have this device, then sb_Before_Pci_Init will not get called. So the missing sb800 USB3 devicees was add to the mainboard devicetree. Because of no physical usb connector connected to USB3, the USB3 device setting was off. Change-Id: If060ccb43df7fbe88bafc61e9e600a9120575437 Signed-off-by: Kerry Sheh <kerry.she@amd.com> Signed-off-by: Kerry Sheh <shekairui@gmail.com> Reviewed-on: http://review.coreboot.org/232 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marcj303@gmail.com>
-rw-r--r--src/mainboard/amd/persimmon/devicetree.cb2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/amd/persimmon/devicetree.cb b/src/mainboard/amd/persimmon/devicetree.cb
index 7da216921f..b47e6b9892 100644
--- a/src/mainboard/amd/persimmon/devicetree.cb
+++ b/src/mainboard/amd/persimmon/devicetree.cb
@@ -87,6 +87,8 @@ chip northbridge/amd/agesa/family14/root_complex
device pci 15.1 off end # PCIe PortB
device pci 15.2 off end # PCIe PortC
device pci 15.3 off end # PCIe PortD
+ device pci 16.0 off end # OHCI USB3
+ device pci 16.2 off end # EHCI USB3
register "gpp_configuration" = "0" #4:0:0:0 (really need to disable all 4 somehow)
register "boot_switch_sata_ide" = "0" # 0: boot from SATA. 1: IDE
end #southbridge/amd/cimx/sb800