summaryrefslogtreecommitdiff
diff options
context:
space:
mode:
authorSergii Dmytruk <sergii.dmytruk@3mdeb.com>2022-01-18 00:11:25 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-04-18 13:05:56 +0000
commit28eaa4a340fb4614ea42a456b7aba631c4dd744b (patch)
treed997b739821e29a067868231974ed352025384ff
parent60b22c4c57d28465adf4e8de331b5207f025f5a4 (diff)
src/cpu/power9: move part of scom.h to scom.c
Reset function, constants and include are not used outside of scom.c and not going to be. Change-Id: Iff4e98ae52c7099954f0c20fcb639eb87af15534 Signed-off-by: Sergii Dmytruk <sergii.dmytruk@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/67055 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Michał Kopeć <michal.kopec@3mdeb.com>
-rw-r--r--src/cpu/power9/scom.c34
-rw-r--r--src/include/cpu/power/scom.h5
2 files changed, 18 insertions, 21 deletions
diff --git a/src/cpu/power9/scom.c b/src/cpu/power9/scom.c
index e55d149bff..3e973e52e3 100644
--- a/src/cpu/power9/scom.c
+++ b/src/cpu/power9/scom.c
@@ -4,6 +4,9 @@
#include <cpu/power/spr.h> // HMER
#include <console/console.h>
+#define XSCOM_ADDR_IND_ADDR PPC_BITMASK(11, 31)
+#define XSCOM_ADDR_IND_DATA PPC_BITMASK(48, 63)
+
#define XSCOM_DATA_IND_READ PPC_BIT(0)
#define XSCOM_DATA_IND_COMPLETE PPC_BIT(32)
#define XSCOM_DATA_IND_ERR PPC_BITMASK(33, 35)
@@ -15,6 +18,21 @@
#define XSCOM_LOG_REG 0x00090012
#define XSCOM_ERR_REG 0x00090013
+static void reset_scom_engine(void)
+{
+ /*
+ * With cross-CPU SCOM accesses, first register should be cleared on the
+ * executing CPU, the other two on target CPU. In that case it may be
+ * necessary to do the remote writes in assembly directly to skip checking
+ * HMER and possibly end in a loop.
+ */
+ write_scom_direct(XSCOM_RCVED_STAT_REG, 0);
+ write_scom_direct(XSCOM_LOG_REG, 0);
+ write_scom_direct(XSCOM_ERR_REG, 0);
+ clear_hmer();
+ eieio();
+}
+
uint64_t read_scom_direct(uint64_t reg_address)
{
uint64_t val;
@@ -117,19 +135,3 @@ uint64_t read_scom_indirect(uint64_t reg_address)
return data & XSCOM_DATA_IND_DATA;
}
-
-/* This function should be rarely called, don't make it inlined */
-void reset_scom_engine(void)
-{
- /*
- * With cross-CPU SCOM accesses, first register should be cleared on the
- * executing CPU, the other two on target CPU. In that case it may be
- * necessary to do the remote writes in assembly directly to skip checking
- * HMER and possibly end in a loop.
- */
- write_scom_direct(XSCOM_RCVED_STAT_REG, 0);
- write_scom_direct(XSCOM_LOG_REG, 0);
- write_scom_direct(XSCOM_ERR_REG, 0);
- clear_hmer();
- eieio();
-}
diff --git a/src/include/cpu/power/scom.h b/src/include/cpu/power/scom.h
index f5354c8314..42eacc6248 100644
--- a/src/include/cpu/power/scom.h
+++ b/src/include/cpu/power/scom.h
@@ -30,13 +30,10 @@
// Higher bits specify indirect address
#define XSCOM_ADDR_IND_FLAG PPC_BIT(0)
-#define XSCOM_ADDR_IND_ADDR PPC_BITMASK(11, 31)
-#define XSCOM_ADDR_IND_DATA PPC_BITMASK(48, 63)
#ifndef __ASSEMBLER__
#include <types.h>
#include <arch/io.h>
-#include <cpu/power/spr.h>
// TODO: these are probably specific to POWER9
typedef enum {
@@ -88,8 +85,6 @@ typedef enum {
EC23_CHIPLET_ID = 0x37 ///< Core23 chiplet (Quad5, EX11, C1)
} chiplet_id_t;
-void reset_scom_engine(void);
-
uint64_t read_scom_direct(uint64_t reg_address);
void write_scom_direct(uint64_t reg_address, uint64_t data);