diff options
| author | li feng <li1.feng@intel.com> | 2020-03-12 16:38:34 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-16 14:47:49 +0000 |
| commit | 23954256533dff885b0291c11b1c00b63617a98d (patch) | |
| tree | b40b310f548cb0c013fb418f478559568394f608 | |
| parent | db992acb73611285ac433d9c7cdf09480be17b54 (diff) | |
mb/intel/tglrvp: Enable ISH driver and register firmware name
BRANCH=none
BUG=b:145946347
TEST=boot to OS with TGL RVP UP3,
then copied ISH firmware to host file system /lib/firmware/intel/tglrvp_ish.bin
check "dmesg |grep ish", it shows:
ish-loader: ISH firmware intel/tglrvp_ish.bin loaded
cros_ec_ishtp: Chrome EC device registered
Those means shim loader in coreboot has loaded ISH firmware, and
firmware is running successfully.
Signed-off-by: Hu, Hebo <hebo.hu@intel.com>
Signed-off-by: li feng <li1.feng@intel.com>
Change-Id: I1ee8050aef6ec0828f16ef2695b5347278caa820
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39481
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Patrick Georgi <pgeorgi@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
| -rw-r--r-- | src/mainboard/intel/tglrvp/Kconfig | 1 | ||||
| -rw-r--r-- | src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb | 7 | ||||
| -rw-r--r-- | src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb | 7 |
3 files changed, 13 insertions, 2 deletions
diff --git a/src/mainboard/intel/tglrvp/Kconfig b/src/mainboard/intel/tglrvp/Kconfig index 2051a056a1..d60918fdb4 100644 --- a/src/mainboard/intel/tglrvp/Kconfig +++ b/src/mainboard/intel/tglrvp/Kconfig @@ -14,6 +14,7 @@ config BOARD_SPECIFIC_OPTIONS select GENERATE_SMBIOS_TABLES select SOC_INTEL_TIGERLAKE select INTEL_LPSS_UART_FOR_CONSOLE + select DRIVERS_INTEL_ISH config CHROMEOS bool diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb index a43011f02c..41a361c016 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up3/devicetree.cb @@ -133,7 +133,12 @@ chip soc/intel/tigerlake device pci 10.2 on end # CNVi: BT 0xA0F5 - A0F7 device pci 10.6 off end # THC0 0xA0D0 device pci 10.7 off end # THC1 0xA0D1 - device pci 12.0 off end # SensorHUB 0xA0FC + device pci 12.0 on # SensorHUB 0xA0FC + chip drivers/intel/ish + register "firmware_name" = ""tglrvp_ish.bin"" + device generic 0 on end + end + end device pci 12.6 off end # GSPI2 0x34FB device pci 13.0 off end # GSPI3 0xA0FD device pci 14.0 on end # USB3.1 xHCI 0xA0ED diff --git a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb index 643db36c2c..586fd26da7 100644 --- a/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb +++ b/src/mainboard/intel/tglrvp/variants/tglrvp_up4/devicetree.cb @@ -129,7 +129,12 @@ chip soc/intel/tigerlake device pci 10.2 off end # CNVi: BT 0xA0F5 - A0F7 device pci 10.6 off end # THC0 0xA0D0 device pci 10.7 off end # THC1 0xA0D1 - device pci 12.0 off end # SensorHUB 0xA0FC + device pci 12.0 on # SensorHUB 0xA0FC + chip drivers/intel/ish + register "firmware_name" = ""tglrvp_ish.bin"" + device generic 0 on end + end + end device pci 12.6 off end # GSPI2 0x34FB device pci 13.0 off end # GSPI3 0xA0FD device pci 14.0 on end # USB3.1 xHCI 0xA0ED |