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authorRaul E Rangel <rrangel@chromium.org>2022-04-22 16:48:47 -0600
committerFelix Held <felix-coreboot@felixheld.de>2022-04-25 14:37:57 +0000
commit22ef1439dd6d3844c548367964238c963593f95a (patch)
treefd41d5f267a330656906fc3caa16c679b33ba25c
parent597b9e9d71a2dd728e4192fa9a083004c96cdfbc (diff)
mb/google/zork: Correct PIRQ_MISC0 configuration
The current configuration is masking off IRQ 1 and IRQ 12 to the PIC. This for some reason causes problems when using level triggered interrupts. This change updates the PIRQ_MISC0 value to match what skyrim is doing. This will enable level interrupts to work correctly. BUG=b:218874489, b:160595155 TEST=Boot zork and verify keyboard still works. Boot with patch train and verify keyboard works as expected. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I46b1fd68915c6f7aa4c34cdba57d24425752bc38 Reviewed-on: https://review.coreboot.org/c/coreboot/+/63796 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
-rw-r--r--src/mainboard/google/zork/mainboard.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/zork/mainboard.c b/src/mainboard/google/zork/mainboard.c
index 54da830004..05e948e780 100644
--- a/src/mainboard/google/zork/mainboard.c
+++ b/src/mainboard/google/zork/mainboard.c
@@ -80,7 +80,7 @@ static const struct fch_irq_routing {
/* The MISC registers are not interrupt numbers */
{ PIRQ_MISC, 0xfa, 0x00 },
- { PIRQ_MISC0, 0xf1, 0x00 },
+ { PIRQ_MISC0, 0x91, 0x00 },
{ PIRQ_MISC1, 0x00, 0x00 },
{ PIRQ_MISC2, 0x00, 0x00 },
};