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authorFelix Held <felix-coreboot@felixheld.de>2023-12-05 00:42:25 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-06 16:02:15 +0000
commit2009b998345f9c37e773c3908e53749f24c6a138 (patch)
tree043be945ea0259a302f8a7cb385c2ec6e239e71e
parentf5b09dbe1840e2ba2bbc9b2c6225e838cb7a32b9 (diff)
nb/amd/pi/00730F01/chipset.cb: don't call dummy function host bridge
Function 0 of the device that has the bridges to other buses is a dummy function that can be left enabled to not have to shuffle around the device function numbers when the first PCI bridge on that device isn't enabled. That dummy device function is however not a PCI host bridge, so change the comment from 'Dummy Host Bridge' to 'Dummy device function'. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Suggested-by: Nico Huber <nico.h@gmx.de> Change-Id: I6069205bd2e1cb0f75025e9f330afc50462e742a Reviewed-on: https://review.coreboot.org/c/coreboot/+/79397 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/northbridge/amd/pi/00730F01/chipset.cb2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/northbridge/amd/pi/00730F01/chipset.cb b/src/northbridge/amd/pi/00730F01/chipset.cb
index bc794262c9..40eb3ef36d 100644
--- a/src/northbridge/amd/pi/00730F01/chipset.cb
+++ b/src/northbridge/amd/pi/00730F01/chipset.cb
@@ -11,7 +11,7 @@ chip northbridge/amd/pi/00730F01
device pci 0.2 alias iommu off end
device pci 1.0 alias gfx off end
device pci 1.1 alias gfx_hda off end
- device pci 2.0 on end # Dummy Host Bridge, do not disable
+ device pci 2.0 on end # Dummy device function, do not disable
device pci 2.1 alias gpp_bridge_0 off end
device pci 2.2 alias gpp_bridge_1 off end
device pci 2.3 alias gpp_bridge_2 off end