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authorxuxinxiong <xuxinxiong@huaqin.corp-partner.google.com>2020-08-31 17:05:48 +0800
committerHung-Te Lin <hungte@chromium.org>2020-09-02 00:43:22 +0000
commit1d418281e098159339e292c1a4f0dde4bf35122c (patch)
treecb518a20f3a6af8620ddbb08ff8916849b791dbb
parent43092765e4cc26a4d5d8d746dfea27d0ec9f27cb (diff)
mb/google/kukui: Add LPDDR4X support for fennel/cerise/stern
Modify the BOARD_SDRAM_TABLE_OFFSET as 0x10 BUG=b:162891673 BRANCH=kukui TEST=make Change-Id: I5a4794d6e899e35686c40a553b991643f9e35ea3 Signed-off-by: xuxinxiong <xuxinxiong@huaqin.corp-partner.google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/44937 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jianbo Zhang <zhangjianbo@huaqin.corp-partner.google.com> Reviewed-by: Zhuohao Lee <zhuohao@chromium.org>
-rw-r--r--src/mainboard/google/kukui/Kconfig2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig
index 01247cace6..4e308ef873 100644
--- a/src/mainboard/google/kukui/Kconfig
+++ b/src/mainboard/google/kukui/Kconfig
@@ -73,7 +73,7 @@ config EC_GOOGLE_CHROMEEC_SPI_BUS
config BOARD_SDRAM_TABLE_OFFSET
hex
- default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE
+ default 0x10 if BOARD_GOOGLE_BURNET || BOARD_GOOGLE_ESCHE || BOARD_GOOGLE_FENNEL || BOARD_GOOGLE_CERISE || BOARD_GOOGLE_STERN
default 0x0
endif