diff options
author | Matt DeVillier <matt.devillier@gmail.com> | 2023-10-22 13:14:19 -0500 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2023-10-26 18:02:24 +0000 |
commit | 14701fb6a6ee2e6650961a52d0b68201a556503d (patch) | |
tree | 6a4d01a216976c90658695f603d0ca4bd95ec067 | |
parent | 859a781705ae8347fe6ab4026917e8be6c3f4ccf (diff) |
mb/google/hatch/baseboard: Use chipset devicetree references
Switch baseboard devicetree to use chipset devicetree references.
Drop any devices whose status (on/off/hidden) matches the default
in the chipset DT.
TEST=build/boot google/hatch (akemi)
Change-Id: I5954c304f3c0e04be7e061c1c23a278f81b6ff4d
Signed-off-by: Matt DeVillier <matt.devillier@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/78551
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Martin L Roth <gaumless@gmail.com>
-rw-r--r-- | src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 107 |
1 files changed, 35 insertions, 72 deletions
diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index d2a25aa897..22bb8b7668 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -198,163 +198,126 @@ chip soc/intel/cannonlake device cpu_cluster 0 on end device domain 0 on - device pci 00.0 on end # Host Bridge - device pci 02.0 on end # Integrated Graphics Device - device pci 04.0 off end # SA Thermal device - device pci 05.0 off end # SA IPU - device pci 12.0 on end # Thermal Subsystem - device pci 12.5 off end # UFS SCS - device pci 12.6 off end # GSPI #2 - device pci 14.0 on + device ref igpu on end + device ref thermal on end + device ref xhci on chip drivers/usb/acpi - register "desc" = ""Root Hub"" - register "type" = "UPC_TYPE_HUB" - device usb 0.0 on + device ref xhci_root_hub on chip drivers/usb/acpi register "desc" = ""Left Type-C Port"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)" - device usb 2.0 on end + device ref usb2_port1 on end end chip drivers/usb/acpi register "desc" = ""Right Type-C Port 1"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 1)" - device usb 2.1 on end + device ref usb2_port2 on end end chip drivers/usb/acpi register "desc" = ""Left Type-A Port"" register "type" = "UPC_TYPE_A" register "group" = "ACPI_PLD_GROUP(1, 2)" - device usb 2.2 on end + device ref usb2_port3 on end end chip drivers/usb/acpi register "desc" = ""Right Type-A Port 1"" register "type" = "UPC_TYPE_A" register "group" = "ACPI_PLD_GROUP(2, 2)" - device usb 2.3 on end + device ref usb2_port4 on end end chip drivers/usb/acpi register "desc" = ""WWAN"" register "type" = "UPC_TYPE_INTERNAL" - device usb 2.5 on end + device ref usb2_port6 on end end chip drivers/usb/acpi register "desc" = ""Camera"" register "type" = "UPC_TYPE_INTERNAL" - device usb 2.6 on end + device ref usb2_port7 on end end chip drivers/usb/acpi register "desc" = ""Bluetooth"" register "type" = "UPC_TYPE_INTERNAL" register "reset_gpio" = "ACPI_GPIO_OUTPUT_ACTIVE_LOW(GPP_C14)" - device usb 2.9 on end + device ref usb2_port10 on end end chip drivers/usb/acpi register "desc" = ""Left Type-C Port"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(1, 1)" - device usb 3.0 on end + device ref usb3_port1 on end end chip drivers/usb/acpi register "desc" = ""Right Type-C Port 1"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "group" = "ACPI_PLD_GROUP(2, 1)" - device usb 3.1 on end + device ref usb3_port2 on end end chip drivers/usb/acpi register "desc" = ""Left Type-A Port"" register "type" = "UPC_TYPE_USB3_A" register "group" = "ACPI_PLD_GROUP(1, 2)" - device usb 3.2 on end + device ref usb3_port3 on end end chip drivers/usb/acpi register "desc" = ""Right Type-A Port 1"" register "type" = "UPC_TYPE_USB3_A" register "group" = "ACPI_PLD_GROUP(2, 2)" - device usb 3.3 on end + device ref usb3_port4 on end end chip drivers/usb/acpi register "desc" = ""WWAN"" register "type" = "UPC_TYPE_INTERNAL" - device usb 3.4 on end + device ref usb3_port5 on end end end end end # USB xHCI - device pci 14.1 off end # USB xDCI (OTG) - device pci 14.3 on + device ref cnvi_wifi on chip drivers/wifi/generic register "wake" = "GPE0_PME_B0" device generic 0 on end end - end # CNVi wifi - device pci 14.5 off end # SDCard - device pci 15.0 on end # I2C #0 - device pci 15.1 on end # I2C #1 - device pci 15.2 off end # I2C #2 - device pci 15.3 off end # I2C #3 - device pci 16.0 on end # Management Engine Interface 1 - device pci 16.1 off end # Management Engine Interface 2 - device pci 16.2 off end # Management Engine IDE-R - device pci 16.3 off end # Management Engine KT Redirection - device pci 16.4 off end # Management Engine Interface 3 - device pci 16.5 off end # Management Engine Interface 4 - device pci 17.0 on end # SATA - device pci 19.0 on end # I2C #4 - device pci 19.1 off end # I2C #5 - device pci 19.2 off end # UART #2 - device pci 1a.0 off end # eMMC - device pci 1c.0 off end # PCI Express Port 1 (USB) - device pci 1c.1 off end # PCI Express Port 2 (USB) - device pci 1c.2 off end # PCI Express Port 3 (USB) - device pci 1c.3 off end # PCI Express Port 4 (USB) - device pci 1c.4 off end # PCI Express Port 5 (USB) - device pci 1c.5 off end # PCI Express Port 6 - device pci 1c.6 off end # PCI Express Port 7 - device pci 1c.7 off end # PCI Express Port 8 - device pci 1d.0 on # PCI Express Port 9 (X4 NVME) - register "PcieRpSlotImplemented[8]" = "1" end - device pci 1d.1 off end # PCI Express Port 10 - device pci 1d.2 off end # PCI Express Port 11 - device pci 1d.3 off end # PCI Express Port 12 - device pci 1d.4 off end # PCI Express port 13 - device pci 1d.5 on + device ref i2c0 on end + device ref i2c1 on end + device ref sata on end + device ref i2c4 on end + device ref pcie_rp9 on + register "PcieRpSlotImplemented[8]" = "1" + end # (x4 NVMe) + device ref pcie_rp14 on chip drivers/wifi/generic register "wake" = "GPE0_DW1_01" device pci 00.0 on end end register "PcieRpSlotImplemented[13]" = "1" - end # PCI Express Port 14 (x4) - device pci 1e.0 on end # UART #0 - device pci 1e.1 off end # UART #1 - device pci 1e.2 on + end # (x1 WiFi) + device ref uart0 on end + device ref gspi0 on chip drivers/spi/acpi register "hid" = "ACPI_DT_NAMESPACE_HID" register "compat_string" = ""google,cr50"" register "irq" = "ACPI_IRQ_EDGE_LOW(GPP_C21_IRQ)" device spi 0 on end end - end # GSPI #0 - device pci 1e.3 off end # GSPI #1 - device pci 1f.0 on + end + device ref lpc_espi on chip ec/google/chromeec device pnp 0c09.0 on end end - end # eSPI Interface - device pci 1f.1 on end # P2SB - device pci 1f.2 hidden end # Power Management Controller - device pci 1f.3 on + end + device ref p2sb on end + device ref hda on chip drivers/sof register "spkr_tplg" = "max98357a" register "jack_tplg" = "rt5682" register "mic_tplg" = "_2ch_pdm0" device generic 0 on end end - end # Intel HDA - device pci 1f.4 on end # SMBus - device pci 1f.5 on end # PCH SPI - device pci 1f.6 off end # GbE + end + device ref smbus on end end end |