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authorKarthikeyan Ramasubramanian <kramasub@google.com>2024-11-08 04:22:00 +0000
committerKarthik Ramasubramanian <kramasub@google.com>2024-11-12 03:31:04 +0000
commit11ff6e22b3d39a9a26973ccdcd5dd6c2431dbfd9 (patch)
tree579dfbb2a1ae862b6c80105688c46a6e646395d7
parent762b6a9639135d61f12dc276931e2c11540eb9b1 (diff)
mb/google/brox: Do not select HAVE_ACPI_RESUME
Brox mainboard does not reliably support S3 entry/exit. Hence do not select HAVE_ACPI_RESUME config option. Also trigger a fail-safe board reset if the system resumes from S3. BUG=b:337274309 TEST=Build Brox BIOS image and boot to OS. Ensure that the _S3 name variable is not advertised in the DSDT. Trigger a S3 entry and ensure that on S3 exit, the board reset is triggered. Change-Id: Ief0936fbcd9e5e34ef175736a858f98edf840719 Signed-off-by: Karthikeyan Ramasubramanian <kramasub@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/85038 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Bob Moragues <moragues@google.com> Reviewed-by: Subrata Banik <subratabanik@google.com>
-rw-r--r--src/mainboard/google/brox/Kconfig1
-rw-r--r--src/mainboard/google/brox/bootblock.c11
2 files changed, 11 insertions, 1 deletions
diff --git a/src/mainboard/google/brox/Kconfig b/src/mainboard/google/brox/Kconfig
index ce14d5b6e5..fb3dfc4428 100644
--- a/src/mainboard/google/brox/Kconfig
+++ b/src/mainboard/google/brox/Kconfig
@@ -23,7 +23,6 @@ config BOARD_GOOGLE_BROX_COMMON
select FW_CONFIG
select FW_CONFIG_SOURCE_CHROMEEC_CBI
select GOOGLE_SMBIOS_MAINBOARD_VERSION
- select HAVE_ACPI_RESUME
select HAVE_ACPI_TABLES
select HAVE_FSP_LOGO_SUPPORT if RUN_FSP_GOP
select I2C_TPM
diff --git a/src/mainboard/google/brox/bootblock.c b/src/mainboard/google/brox/bootblock.c
index c24e9590e2..3a5f785582 100644
--- a/src/mainboard/google/brox/bootblock.c
+++ b/src/mainboard/google/brox/bootblock.c
@@ -1,7 +1,11 @@
/* SPDX-License-Identifier: GPL-2.0-or-later */
+#include <acpi/acpi.h>
#include <baseboard/variants.h>
#include <bootblock_common.h>
+#include <bootmode.h>
+#include <reset.h>
+#include <security/vboot/vboot_common.h>
void bootblock_mainboard_early_init(void)
{
@@ -13,6 +17,13 @@ void bootblock_mainboard_early_init(void)
void bootblock_mainboard_init(void)
{
+ if (platform_is_resuming()) {
+ printk(BIOS_EMERG, "ACPI S3 resume is not supported on this platform\n");
+ /* Prepare for reboot to clear the sleep state such that the board
+ is not stuck in reboot loop. */
+ vboot_platform_prepare_reboot();
+ board_reset();
+ }
variant_update_descriptor();
}