diff options
| author | Appukuttan V K <appukuttan.vk@intel.com> | 2024-05-30 00:05:09 +0530 |
|---|---|---|
| committer | Subrata Banik <subratabanik@google.com> | 2024-05-31 08:22:01 +0000 |
| commit | 11fad8fc86a902347365491c4239e45531a392e6 (patch) | |
| tree | 3275e8f572e3412d96a55f99d1775477fe5be6df | |
| parent | 415932097a8fc61690a051877edb02c6ed6a05fd (diff) | |
soc/intel/meteorlake: Exclude deprecated upd from FSP2.4 builds
EnableMultiPhaseSiliconInit upd is deprecated and has been
removed starting with v2.4 of FSP specification. Multi-phase
silicon initialization is mandatory for all FSP implementations
compliant to v2.4.
The following modifications are made:
- In fsp_params.c and silicon_init.c EnableMultiPhaseSiliconInit
update is guarded so that it will get included only if FSP2.4
is not selected.
BUG=b:329034258
TEST=Verified x86_32 and x86_64 builds on Meteor Lake board (Rex)
Change-Id: Icdbf3bacc0a05975fc941b264fd400d74f506fce
Signed-off-by: Appukuttan V K <appukuttan.vk@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/82699
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
| -rw-r--r-- | src/drivers/intel/fsp2_0/silicon_init.c | 2 | ||||
| -rw-r--r-- | src/soc/intel/meteorlake/fsp_params.c | 3 |
2 files changed, 4 insertions, 1 deletions
diff --git a/src/drivers/intel/fsp2_0/silicon_init.c b/src/drivers/intel/fsp2_0/silicon_init.c index 89b8a1b2a2..cea894c245 100644 --- a/src/drivers/intel/fsp2_0/silicon_init.c +++ b/src/drivers/intel/fsp2_0/silicon_init.c @@ -77,7 +77,7 @@ bool fsp_is_multi_phase_init_enabled(void) static void fsp_fill_common_arch_params(FSPS_UPD *supd) { -#if CONFIG(FSPS_HAS_ARCH_UPD) +#if (CONFIG(FSPS_HAS_ARCH_UPD) && !CONFIG(PLATFORM_USES_FSP2_4)) FSPS_ARCHx_UPD *s_arch_cfg = &supd->FspsArchUpd; s_arch_cfg->EnableMultiPhaseSiliconInit = fsp_is_multi_phase_init_enabled(); #endif diff --git a/src/soc/intel/meteorlake/fsp_params.c b/src/soc/intel/meteorlake/fsp_params.c index 0ac3b48e75..36412b7d88 100644 --- a/src/soc/intel/meteorlake/fsp_params.c +++ b/src/soc/intel/meteorlake/fsp_params.c @@ -705,10 +705,13 @@ static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, static void arch_silicon_init_params(FSPS_ARCHx_UPD *s_arch_cfg) { + +#if !CONFIG(PLATFORM_USES_FSP2_4) /* * EnableMultiPhaseSiliconInit for running MultiPhaseSiInit */ s_arch_cfg->EnableMultiPhaseSiliconInit = 1; +#endif /* Assign FspEventHandler arch Upd to use coreboot debug event handler */ if (CONFIG(FSP_USES_CB_DEBUG_EVENT_HANDLER) && CONFIG(CONSOLE_SERIAL) && |