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authorWerner Zeh <werner.zeh@siemens.com>2021-07-23 09:44:07 +0200
committerPatrick Georgi <pgeorgi@google.com>2021-07-29 09:13:04 +0000
commit11d65f9f03c6ae9296e785ae272b08f758f34713 (patch)
tree59c7df89ab44096f4c1b8548bc7b7c1d804834bb
parent04d8cc3514c3da3e3790d56417e0b0d6420d56df (diff)
mb/siemens/mc_ehl: Enable LPC TPM
All the boards based on the mc_ehl baseboard have a TPM which is connected to SPI but mapped into the address space of the x86 so that it acts like a LPC attached TPM. Enable the TPM driver so that it will be used. In addition add the needed entry in devicetree. Change-Id: I301d0ed4a108bac45d95eced120e7ba280945d9c Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/56541 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
-rw-r--r--src/mainboard/siemens/mc_ehl/Kconfig2
-rw-r--r--src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb6
2 files changed, 7 insertions, 1 deletions
diff --git a/src/mainboard/siemens/mc_ehl/Kconfig b/src/mainboard/siemens/mc_ehl/Kconfig
index 5c36c8f14e..926e668da7 100644
--- a/src/mainboard/siemens/mc_ehl/Kconfig
+++ b/src/mainboard/siemens/mc_ehl/Kconfig
@@ -6,6 +6,8 @@ config BOARD_SIEMENS_BASEBOARD_MC_EHL
select HAVE_SPD_IN_CBFS
select HAVE_ACPI_TABLES
select DRIVERS_I2C_RX6110SA
+ select MAINBOARD_HAS_TPM2
+ select MAINBOARD_HAS_LPC_TPM
source "src/mainboard/siemens/mc_ehl/variants/*/Kconfig"
diff --git a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
index 03d10aacb1..2f8df049ab 100644
--- a/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
+++ b/src/mainboard/siemens/mc_ehl/variants/mc_ehl1/devicetree.cb
@@ -214,7 +214,11 @@ chip soc/intel/elkhartlake
device pci 1e.6 on end # HPET
device pci 1e.7 on end # IOAPIC
- device pci 1f.0 on end # eSPI Interface
+ device pci 1f.0 on # eSPI Interface
+ chip drivers/pc80/tpm
+ device pnp 0c31.0 on end
+ end
+ end
device pci 1f.1 on end # P2SB
device pci 1f.2 hidden end # Power Management Controller
device pci 1f.3 off end # Intel cAVS/HDA