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authorHannah Williams <hannah.williams@intel.com>2018-05-11 19:14:38 -0700
committerFurquan Shaikh <furquan@google.com>2018-05-18 06:19:32 +0000
commit09b883f352f9029d87d2fd48a3918f894f8d0c8c (patch)
tree6aa4d4b545189d2904ed607efed8e7f8b1388a8f
parent5c3452b80032eb81cc458d1fae63089ccc96d95a (diff)
mb/google/octopus: Disable BT before S5 entry
The CNVi wifi/bt module prevents entry into S5 by keeping internal SoC clocks running. Therefore it's necessary to disable BT prior to S5 entry. BUG=b:79606769 TEST= Test if BT device works under following cases: 1. Power-on 2. Press powerbtn before OS entry 3. Power-on from S5 again Change-Id: Ibc14b4080a27de48d197e16d0eed162603482de2 Signed-off-by: Hannah Williams <hannah.williams@intel.com> Reviewed-on: https://review.coreboot.org/26238 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/octopus/smihandler.c2
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/gpio.c14
-rw-r--r--src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h2
3 files changed, 15 insertions, 3 deletions
diff --git a/src/mainboard/google/octopus/smihandler.c b/src/mainboard/google/octopus/smihandler.c
index d430c4d17f..ecd41ae300 100644
--- a/src/mainboard/google/octopus/smihandler.c
+++ b/src/mainboard/google/octopus/smihandler.c
@@ -34,7 +34,7 @@ void mainboard_smi_sleep(u8 slp_typ)
const struct pad_config *pads;
size_t num;
- pads = variant_sleep_gpio_table(&num);
+ pads = variant_sleep_gpio_table(&num, slp_typ);
gpio_configure_pads(pads, num);
chromeec_smi_sleep(slp_typ, MAINBOARD_EC_S3_WAKE_EVENTS,
diff --git a/src/mainboard/google/octopus/variants/baseboard/gpio.c b/src/mainboard/google/octopus/variants/baseboard/gpio.c
index e48ac632d8..667c5f4dcc 100644
--- a/src/mainboard/google/octopus/variants/baseboard/gpio.c
+++ b/src/mainboard/google/octopus/variants/baseboard/gpio.c
@@ -13,6 +13,7 @@
* GNU General Public License for more details.
*/
+#include <arch/acpi.h>
#include <baseboard/gpio.h>
#include <baseboard/variants.h>
#include <commonlib/helpers.h>
@@ -300,9 +301,20 @@ variant_early_gpio_table(size_t *num)
static const struct pad_config sleep_gpio_table[] = {
};
+/* GPIO settings before entering slp_s5. */
+static const struct pad_config sleep_s5_gpio_table[] = {
+ /* BT_DISABLE_L */
+ PAD_CFG_GPO_IOSSTATE_IOSTERM(GPIO_109, 0, DEEP, NONE, Tx0RXDCRx1, SAME),
+};
+
const struct pad_config *__weak
-variant_sleep_gpio_table(size_t *num)
+variant_sleep_gpio_table(size_t *num, int slp_typ)
{
+ if (slp_typ == ACPI_S5) {
+ *num = ARRAY_SIZE(sleep_s5_gpio_table);
+ return sleep_s5_gpio_table;
+ }
+
*num = ARRAY_SIZE(sleep_gpio_table);
return sleep_gpio_table;
}
diff --git a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h
index c278cdee26..4c3fbbef7b 100644
--- a/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h
+++ b/src/mainboard/google/octopus/variants/baseboard/include/baseboard/variants.h
@@ -28,7 +28,7 @@ uint8_t variant_board_id(void);
* entries for each table. */
const struct pad_config *variant_gpio_table(size_t *num);
const struct pad_config *variant_early_gpio_table(size_t *num);
-const struct pad_config *variant_sleep_gpio_table(size_t *num);
+const struct pad_config *variant_sleep_gpio_table(size_t *num, int slp_typ);
/* Baseboard default swizzle. Can be reused if swizzle is same. */
extern const struct lpddr4_swizzle_cfg baseboard_lpddr4_swizzle;