diff options
| author | Renze Nicolai <renze@rnplus.nl> | 2017-12-18 02:35:04 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2018-01-07 02:26:50 +0000 |
| commit | 08991bf4e423f3859357a3ac3a442dd1633962b3 (patch) | |
| tree | 2145545f38236ad16b9adbaf898bfe4fa8b1cb5c | |
| parent | 40275217569502977caad9da0ecc43ea77c06148 (diff) | |
mainboard/ms7721: Fix temperature sensor configuration
This patch allows temperature sensors 1 and 2 to function by setting
their type to be thermistor instead of BJT.
Change-Id: I6491171eacc0c9848ba86ba7a62ec440226aae36
Signed-off-by: Renze Nicolai <renze@rnplus.nl>
Reviewed-on: https://review.coreboot.org/22922
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
| -rw-r--r-- | src/mainboard/msi/ms7721/devicetree.cb | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/src/mainboard/msi/ms7721/devicetree.cb b/src/mainboard/msi/ms7721/devicetree.cb index d46eb846a5..7eaf78c9c9 100644 --- a/src/mainboard/msi/ms7721/devicetree.cb +++ b/src/mainboard/msi/ms7721/devicetree.cb @@ -76,6 +76,8 @@ chip northbridge/amd/agesa/family15tn/root_complex register "hwm_fan1_seg2_speed_count" = "0x0e" register "hwm_fan1_seg3_speed_count" = "0x07" register "hwm_fan1_temp_map_sel" = "0x8c" + register "hwm_temp_sensor_type" = "0x08" + device pnp 4e.00 off end device pnp 4e.01 on # COM1 io 0x60 = 0x3f8 @@ -92,7 +94,7 @@ chip northbridge/amd/agesa/family15tn/root_complex irq 0xf0 = 0x44 # PRT Mode Select Register end device pnp 4e.04 on # Hardware Monitor - io 0x60 = 0x600 + io 0x60 = 0x225 # Fintek datasheet says 0x295. irq 0x70 = 0 end device pnp 4e.05 on # KBC |