diff options
| author | Roja Rani Yarubandi <rojay@codeaurora.org> | 2020-09-25 20:05:05 +0530 |
|---|---|---|
| committer | Shelley Chen <shchen@google.com> | 2021-09-03 18:01:57 +0000 |
| commit | 04096b97739f3ce603f95c4d22ec18d88f38b746 (patch) | |
| tree | 7255fe9fa9f7f0cccb38a2bc018b466033f7f225 | |
| parent | 684a4f21bb5ce890e441ecac8b6f02d4f0e50b9d (diff) | |
sc7280: Refactor QSPI driver
Refactor Qcom QSPI driver to separate common
and SoC specific driver code.
BUG=b:182963902
TEST=Validated on qualcomm sc7280 development board
Signed-off-by: Rajesh Patil <rajpat@codeaurora.org>
Change-Id: Ibe1dc3fe8bd71957ff8604ef4c9d97963100ccfb
Reviewed-on: https://review.coreboot.org/c/coreboot/+/55322
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Shelley Chen <shchen@google.com>
| -rw-r--r-- | src/soc/qualcomm/sc7280/Kconfig | 9 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/Makefile.inc | 3 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/bootblock.c | 6 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/include/soc/addressmap.h | 10 | ||||
| -rw-r--r-- | src/soc/qualcomm/sc7280/spi.c | 16 |
5 files changed, 25 insertions, 19 deletions
diff --git a/src/soc/qualcomm/sc7280/Kconfig b/src/soc/qualcomm/sc7280/Kconfig index 1bba460488..fad3040dcf 100644 --- a/src/soc/qualcomm/sc7280/Kconfig +++ b/src/soc/qualcomm/sc7280/Kconfig @@ -26,4 +26,13 @@ config VBOOT select VBOOT_MUST_REQUEST_DISPLAY select VBOOT_STARTS_IN_BOOTBLOCK +config SC7280_QSPI + bool + default y if COMMON_CBFS_SPI_WRAPPER + prompt "Build Flash Using SPI-NOR" + +config BOOT_DEVICE_SPI_FLASH_BUS + int + default 16 + endif diff --git a/src/soc/qualcomm/sc7280/Makefile.inc b/src/soc/qualcomm/sc7280/Makefile.inc index b44c754c16..9c85968221 100644 --- a/src/soc/qualcomm/sc7280/Makefile.inc +++ b/src/soc/qualcomm/sc7280/Makefile.inc @@ -1,10 +1,11 @@ ifeq ($(CONFIG_SOC_QUALCOMM_SC7280),y) all-y += ../common/timer.c -all-y += spi.c all-y += ../common/gpio.c all-y += ../common/clock.c all-y += clock.c +all-y += ../common/spi.c +all-$(CONFIG_SC7280_QSPI) += ../common/qspi.c ################################################################################ bootblock-y += bootblock.c diff --git a/src/soc/qualcomm/sc7280/bootblock.c b/src/soc/qualcomm/sc7280/bootblock.c index 807bb254b7..ce86151145 100644 --- a/src/soc/qualcomm/sc7280/bootblock.c +++ b/src/soc/qualcomm/sc7280/bootblock.c @@ -1,9 +1,11 @@ /* SPDX-License-Identifier: GPL-2.0-only */ #include <bootblock_common.h> -#include <soc/mmu.h> +#include <soc/clock.h> +#include <soc/qspi_common.h> void bootblock_soc_init(void) { - sc7280_mmu_init(); + clock_init(); + quadspi_init(37500 * KHz); } diff --git a/src/soc/qualcomm/sc7280/include/soc/addressmap.h b/src/soc/qualcomm/sc7280/include/soc/addressmap.h index 82c84ae2f8..6ef653375e 100644 --- a/src/soc/qualcomm/sc7280/include/soc/addressmap.h +++ b/src/soc/qualcomm/sc7280/include/soc/addressmap.h @@ -14,4 +14,14 @@ #define SILVER_PLL_BASE 0x18280000 #define TLMM_TILE_BASE 0x0F100000 +/* SC7280 QSPI GPIO PINS */ +#define QSPI_CS GPIO(15) +#define QSPI_DATA_0 GPIO(12) +#define QSPI_DATA_1 GPIO(13) +#define QSPI_CLK GPIO(14) + +#define GPIO_FUNC_QSPI_DATA_0 GPIO12_FUNC_QSPI_DATA_0 +#define GPIO_FUNC_QSPI_DATA_1 GPIO13_FUNC_QSPI_DATA_1 +#define GPIO_FUNC_QSPI_CLK GPIO14_FUNC_QSPI_CLK + #endif /* __SOC_QUALCOMM_SC7280_ADDRESS_MAP_H__ */ diff --git a/src/soc/qualcomm/sc7280/spi.c b/src/soc/qualcomm/sc7280/spi.c deleted file mode 100644 index 50aa395a05..0000000000 --- a/src/soc/qualcomm/sc7280/spi.c +++ /dev/null @@ -1,16 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <spi-generic.h> -#include <spi_flash.h> - -static const struct spi_ctrlr spi_ctrlr; - -const struct spi_ctrlr_buses spi_ctrlr_bus_map[] = { - { - .ctrlr = &spi_ctrlr, - .bus_start = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, - .bus_end = CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, - }, -}; - -const size_t spi_ctrlr_bus_map_count = ARRAY_SIZE(spi_ctrlr_bus_map); |