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authorUwe Hermann <uwe@hermann-uwe.de>2010-11-07 16:49:31 +0000
committerUwe Hermann <uwe@hermann-uwe.de>2010-11-07 16:49:31 +0000
commitfbd85a13aeb49aa73bec899e284347f7640909a0 (patch)
tree4a87c87e346e48c0346163915161585d0409fe44
parent68854f3cc96ab9eed30c347fdf029dac5c47d792 (diff)
ECS P6IWP-Fe: Fix typo, add missing license header.
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
-rw-r--r--src/mainboard/ecs/Kconfig2
-rw-r--r--src/mainboard/ecs/p6iwp-fe/devicetree.cb20
2 files changed, 21 insertions, 1 deletions
diff --git a/src/mainboard/ecs/Kconfig b/src/mainboard/ecs/Kconfig
index 48501f6e6b..908616795d 100644
--- a/src/mainboard/ecs/Kconfig
+++ b/src/mainboard/ecs/Kconfig
@@ -23,7 +23,7 @@ choice
prompt "Mainboard model"
config BOARD_ECS_P6IWP_FE
- bool "P6IWP-FE"
+ bool "P6IWP-Fe"
endchoice
diff --git a/src/mainboard/ecs/p6iwp-fe/devicetree.cb b/src/mainboard/ecs/p6iwp-fe/devicetree.cb
index 18bb8c860d..d2b8249873 100644
--- a/src/mainboard/ecs/p6iwp-fe/devicetree.cb
+++ b/src/mainboard/ecs/p6iwp-fe/devicetree.cb
@@ -1,3 +1,23 @@
+##
+## This file is part of the coreboot project.
+##
+## Copyright (C) 2010 Anders Jenbo <anders@jenbo.dk>
+##
+## This program is free software; you can redistribute it and/or modify
+## it under the terms of the GNU General Public License as published by
+## the Free Software Foundation; either version 2 of the License, or
+## (at your option) any later version.
+##
+## This program is distributed in the hope that it will be useful,
+## but WITHOUT ANY WARRANTY; without even the implied warranty of
+## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+## GNU General Public License for more details.
+##
+## You should have received a copy of the GNU General Public License
+## along with this program; if not, write to the Free Software
+## Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
+##
+
chip northbridge/intel/i82810 # Northbridge
device lapic_cluster 0 on # APIC cluster
chip cpu/intel/socket_PGA370 # CPU