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authorAlex Levin <levinale@chromium.org>2020-06-11 20:09:45 -0700
committerPatrick Georgi <pgeorgi@google.com>2020-06-14 16:48:25 +0000
commitf3668fc1de927c87a2a895bc2a433df3f45e2f92 (patch)
treeb32752835e021b5b68fff92a1aa8974b62bb384d
parent3e2fabfa5e551494419467f4f4d2d10086022f3d (diff)
soc/intel/tigerlake: enable CPU_INTEL_COMMON
Since we plan to use VMX, enable CPU_INTEL_COMMON. BUG=b:157388365 TEST=tested on Volteer Signed-off-by: Alex Levin <levinale@chromium.org> Change-Id: I5e7bdb4310947dd8a94ee554834a67ce94377ea5 Reviewed-on: https://review.coreboot.org/c/coreboot/+/42298 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
-rw-r--r--src/soc/intel/tigerlake/Kconfig1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/tigerlake/Kconfig b/src/soc/intel/tigerlake/Kconfig
index cc49d9d701..a61cbfc85e 100644
--- a/src/soc/intel/tigerlake/Kconfig
+++ b/src/soc/intel/tigerlake/Kconfig
@@ -15,6 +15,7 @@ config CPU_SPECIFIC_OPTIONS
select BOOT_DEVICE_SPI_FLASH_RW_NOMMAP_EARLY if BOOT_DEVICE_SPI_FLASH
select BOOT_DEVICE_SUPPORTS_WRITES
select CACHE_MRC_SETTINGS
+ select CPU_INTEL_COMMON
select CPU_INTEL_FIRMWARE_INTERFACE_TABLE
select FSP_M_XIP
select GENERIC_GPIO_LIB