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| author | Claus Gindhart <claus.gindhart@kontron.com> | 2008-05-14 12:22:38 +0000 |
|---|---|---|
| committer | Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> | 2008-05-14 12:22:38 +0000 |
| commit | e173f9904cc8623e81246b6a5a141021c19522b7 (patch) | |
| tree | 6a05d3bc1aa15024e3a4191212899b8831cd89aa | |
| parent | 42aab08d842e3156621e8e10797d87fe561f4a5d (diff) | |
Add the Intel 6300ESB as known chipset to the chipset struct enables.
Signed-off-by: Claus Gindhart <claus.gindhart@kontron.com>
Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3310 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/flashrom/chipset_enable.c | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/util/flashrom/chipset_enable.c b/util/flashrom/chipset_enable.c index 77a132a49f..973fb81514 100644 --- a/util/flashrom/chipset_enable.c +++ b/util/flashrom/chipset_enable.c @@ -577,6 +577,7 @@ static const FLASH_ENABLE enables[] = { {0x8086, 0x24c0, "Intel ICH4/ICH4-L", enable_flash_ich_4e}, {0x8086, 0x24cc, "Intel ICH4-M", enable_flash_ich_4e}, {0x8086, 0x24d0, "Intel ICH5/ICH5R", enable_flash_ich_4e}, + {0x8086, 0x25a1, "Intel 6300ESB", enable_flash_ich_4e}, {0x8086, 0x2640, "Intel ICH6/ICH6R", enable_flash_ich_dc}, {0x8086, 0x2641, "Intel ICH6-M", enable_flash_ich_dc}, {0x8086, 0x27b0, "Intel ICH7DH", enable_flash_ich_dc_spi}, |