diff options
author | Angel Pons <th3fanbus@gmail.com> | 2020-06-01 19:45:34 +0200 |
---|---|---|
committer | Angel Pons <th3fanbus@gmail.com> | 2020-07-21 18:22:59 +0000 |
commit | d39e6b6d817167a3bcd39d8b9e36179ad155c9e2 (patch) | |
tree | 481674b6f92eb934d6dba2faab2cd883d84996f5 | |
parent | 90e9f5472680bbc44fe4e23b390a9323f8c59643 (diff) |
sandybridge/bd82x6x: Use common code for early SMBus
Change-Id: I95b82f3d733db2a46096205f23ed85aaff021e28
Signed-off-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42000
Reviewed-by: Patrick Rudolph <siro@das-labor.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r-- | src/southbridge/intel/bd82x6x/Kconfig | 1 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/Makefile.inc | 2 | ||||
-rw-r--r-- | src/southbridge/intel/bd82x6x/early_smbus.c | 34 |
3 files changed, 2 insertions, 35 deletions
diff --git a/src/southbridge/intel/bd82x6x/Kconfig b/src/southbridge/intel/bd82x6x/Kconfig index 9de3bf8c94..7852ace972 100644 --- a/src/southbridge/intel/bd82x6x/Kconfig +++ b/src/southbridge/intel/bd82x6x/Kconfig @@ -14,6 +14,7 @@ config SOUTH_BRIDGE_OPTIONS # dummy select SOUTHBRIDGE_INTEL_COMMON_FINALIZE select SOUTHBRIDGE_INTEL_COMMON_RCBA_PIRQ select SOUTHBRIDGE_INTEL_COMMON_SMBUS + select SOUTHBRIDGE_INTEL_COMMON_EARLY_SMBUS select SOUTHBRIDGE_INTEL_COMMON_SPI_ICH9 select SOUTHBRIDGE_INTEL_COMMON_PMCLIB select SOUTHBRIDGE_INTEL_COMMON_PMBASE diff --git a/src/southbridge/intel/bd82x6x/Makefile.inc b/src/southbridge/intel/bd82x6x/Makefile.inc index 1e80cf9938..3b10201930 100644 --- a/src/southbridge/intel/bd82x6x/Makefile.inc +++ b/src/southbridge/intel/bd82x6x/Makefile.inc @@ -27,7 +27,7 @@ ramstage-$(CONFIG_ELOG) += elog.c smm-y += smihandler.c me.c me_8.x.c pch.c -romstage-y += early_smbus.c me_status.c +romstage-y += me_status.c romstage-y += early_rcba.c romstage-y += early_pch.c diff --git a/src/southbridge/intel/bd82x6x/early_smbus.c b/src/southbridge/intel/bd82x6x/early_smbus.c deleted file mode 100644 index 85f20a745c..0000000000 --- a/src/southbridge/intel/bd82x6x/early_smbus.c +++ /dev/null @@ -1,34 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include <device/pci_ids.h> -#include <device/pci_ops.h> -#include <device/pci_def.h> -#include <device/smbus_host.h> -#include "pch.h" - -uintptr_t smbus_base(void) -{ - return CONFIG_FIXED_SMBUS_IO_BASE; -} - -int smbus_enable_iobar(uintptr_t base) -{ - /* Set the SMBus device statically. */ - pci_devfn_t dev = PCI_DEV(0x0, 0x1f, 0x3); - - /* Check to make sure we've got the right device. */ - if (pci_read_config16(dev, PCI_VENDOR_ID) != PCI_VENDOR_ID_INTEL) - return -1; - - /* Set SMBus I/O base. */ - pci_write_config32(dev, SMB_BASE, - base | PCI_BASE_ADDRESS_SPACE_IO); - - /* Set SMBus enable. */ - pci_write_config8(dev, HOSTC, HST_EN); - - /* Set SMBus I/O space enable. */ - pci_write_config16(dev, PCI_COMMAND, PCI_COMMAND_IO); - - return 0; -} |