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authorKane Chen <kane_chen@pegatron.corp-partner.google.com>2021-02-04 16:22:42 +0800
committerMartin Roth <martinroth@google.com>2021-02-23 01:14:58 +0000
commitca5ed4879fd859b050682591459113f39d4caf84 (patch)
treeab0db8072c77cd49e76fd60332ca86702fb58611
parent202b1899dc0f7701b03a7839bccd3bf0438f1ac7 (diff)
mb/google/zork/var/shuboz: Adjust GPIO settings
1. GPIO_4 to NC BUG=b:179333669 BRANCH=zork TEST=emerge-zork coreboot Signed-off-by: Kane Chen <kane_chen@pegatron.corp-partner.google.com> Change-Id: I4342b2beb7fc755bee47ee4fad0023d7a6592c4b Reviewed-on: https://review.coreboot.org/c/coreboot/+/50277 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
-rw-r--r--src/mainboard/google/zork/variants/shuboz/gpio.c2
1 files changed, 2 insertions, 0 deletions
diff --git a/src/mainboard/google/zork/variants/shuboz/gpio.c b/src/mainboard/google/zork/variants/shuboz/gpio.c
index db20e44699..43575820ec 100644
--- a/src/mainboard/google/zork/variants/shuboz/gpio.c
+++ b/src/mainboard/google/zork/variants/shuboz/gpio.c
@@ -7,6 +7,8 @@
#include <ec/google/chromeec/ec.h>
static const struct soc_amd_gpio bid_gpio_set_stage_ram[] = {
+ /* PEN_DETECT_ODL - Not connected */
+ PAD_NC(GPIO_4),
/* AGPIO_5 - NC */
PAD_NC(GPIO_5),
/* EGPIO141 - NC */