diff options
| author | David Hendricks <dhendrix@google.com> | 2011-02-17 00:52:02 +0000 |
|---|---|---|
| committer | David Hendricks <dhendrix@google.com> | 2011-02-17 00:52:02 +0000 |
| commit | b159f7ab37c480e54bf3593e2e1cb880f6f8ef84 (patch) | |
| tree | 847a499061a2ccab4e2d9795dbeb5f4e7d06b2dd | |
| parent | 650cf237ac4e314d168fbe23fe8fceb9c192849b (diff) | |
add mec1308 support to superiotool
This patch also disables FDC37M81x since it has a conflicting device ID
and is not supported very well anyway.
Signed-off-by: David Hendricks <dhendrix@google.com>
Acked-by: Stefan Reinauer <reinauer@google.com>
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@6370 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
| -rw-r--r-- | util/superiotool/smsc.c | 30 |
1 files changed, 30 insertions, 0 deletions
diff --git a/util/superiotool/smsc.c b/util/superiotool/smsc.c index e3125c15c3..260f3bb208 100644 --- a/util/superiotool/smsc.c +++ b/util/superiotool/smsc.c @@ -358,6 +358,8 @@ static const struct superio_registers reg_table[] = { {0x30,0x60,0x61,0x70,0xf0,EOT}, {0x00,0x00,0x00,NANA,NANA,EOT}}, {EOT}}}, +#if 0 + /* FIXME: FDC37M81x and MEC1308 have conflicting device IDs */ {0x4d, "FDC37M81x", { {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x2b,0x2c, @@ -390,6 +392,34 @@ static const struct superio_registers reg_table[] = { NANA,NANA,NANA,NANA,0x00,0x00,0x00,0x00,RSVD,RSVD, RSVD,RSVD,RSVD,RSVD,EOT}}, {EOT}}}, +#endif + {0x4d, "MEC1308", { + {NOLDN, NULL, + {0x02,0x03,0x07,0x17,0x20,0x21,0x22,0x23,0x24,0x25, + 0x26,0x27,0X28,0X29,0X2a,0X2b,0X2c,0X2d,0X2e,0X2f, + EOT}, + {0x00,RSVD,0x00,RSVD,0x4d,0x00,0x00,0x00,0x04,0x04, + MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC,MISC, + EOT}}, + {0x1, "PM1", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x00,EOT}}, + {0x4, "COM1", + {0x30,0x60,0x61,0x70,EOT}, + {0x00,0x00,0x00,0x00,EOT}}, + {0x7, "KBD", + {0x30,0x70,0x72,0xF0,EOT}, + {0x00,0x00,0x00,0x00,EOT}}, + {0x8, "EC/ACPI", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x62,EOT}}, + {0x9, "Mailbox", + {0x30,0x60,0x61,EOT}, + {0x00,0x00,0x00,EOT}}, + {0x10, "CIRV", + {0x30,0x60,0x61,0x70,0xf0,0xf1,0xf3,0xf4,EOT}, + {0x00,0x00,0x00,0x00,0x00,0x00,0x00,0x00,EOT}}, + {EOT}}}, {0x51, "LPC47B27x", { {NOLDN, NULL, {0x03,0x20,0x21,0x22,0x23,0x24,0x26,0x27,0x28, |