diff options
author | John Zhao <john.zhao@intel.com> | 2020-03-03 10:48:25 -0800 |
---|---|---|
committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-07 20:46:49 +0000 |
commit | 97fe371b9f1f1050ebc2edf87508ced79aa87b46 (patch) | |
tree | 7fa87bdc88a8e1017f9a7603025f436e42aae323 | |
parent | 58cf6030f54035148e9f6bf5e2ba60892cfd54da (diff) |
soc/intel/tigerlake: Avoid NULL pointer dereference
Coverity detects pointer dev as FORWARD_NULL. Add sanity check
for dev to prevent NULL pointer dereference if dev did not point
to the audio device.
BUG=CID 1420208
TEST=Built image successfully.
Change-Id: I2a62da44c7044f9dc281eae0949f7f7b612ab238
Signed-off-by: John Zhao <john.zhao@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39261
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
-rw-r--r-- | src/soc/intel/tigerlake/romstage/fsp_params_jsl.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c index 56124f4c04..9c70f2ece1 100644 --- a/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c +++ b/src/soc/intel/tigerlake/romstage/fsp_params_jsl.c @@ -95,7 +95,11 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, m_cfg->DdiPortCDdc = config->DdiPortCDdc; /* Audio */ - m_cfg->PchHdaEnable = pcidev_path_on_root(PCH_DEVFN_HDA) ? dev->enabled : 0; + dev = pcidev_path_on_root(PCH_DEVFN_HDA); + if (!dev) + m_cfg->PchHdaEnable = 0; + else + m_cfg->PchHdaEnable = dev->enabled; m_cfg->PchHdaDspEnable = config->PchHdaDspEnable; m_cfg->PchHdaAudioLinkHdaEnable = config->PchHdaAudioLinkHdaEnable; |